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8 changes: 2 additions & 6 deletions tests/arch/common/gen_isr_table/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,8 @@
#define ISR3_OFFSET 17
#define ISR5_OFFSET 18
#define TRIG_CHECK_SIZE 19
#elif defined(CONFIG_SOC_SERIES_NRF54H) && defined(CONFIG_RISCV_CORE_NORDIC_VPR)
#elif (defined(CONFIG_SOC_SERIES_NRF54H) || defined(CONFIG_SOC_SERIES_NRF92)) && \
defined(CONFIG_RISCV_CORE_NORDIC_VPR)

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tests/arch/common/gen_isr_table/src/main.c:41 -#elif (defined(CONFIG_SOC_SERIES_NRF54H) || defined(CONFIG_SOC_SERIES_NRF92)) && \ +#elif (defined(CONFIG_SOC_SERIES_NRF54H) || defined(CONFIG_SOC_SERIES_NRF92)) && \ See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
#define ISR1_OFFSET 14
#define ISR3_OFFSET 15
#define ISR5_OFFSET 16
Expand All @@ -47,11 +48,6 @@
#define ISR3_OFFSET 21
#define ISR5_OFFSET 22
#define TRIG_CHECK_SIZE 23
#elif defined(CONFIG_SOC_NRF9280_CPUPPR)
#define ISR1_OFFSET 14
#define ISR3_OFFSET 15
#define ISR5_OFFSET 16
#define TRIG_CHECK_SIZE 17
#else
#error "Target not supported"
#endif
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13 changes: 4 additions & 9 deletions tests/arch/common/interrupt/src/nested_irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -69,7 +69,8 @@

#define IRQ0_PRIO 1
#define IRQ1_PRIO 2
#elif defined(CONFIG_SOC_SERIES_NRF54H) && defined(CONFIG_RISCV_CORE_NORDIC_VPR)
#elif (defined(CONFIG_SOC_SERIES_NRF54H) || defined(CONFIG_SOC_SERIES_NRF92)) && \
defined(CONFIG_RISCV_CORE_NORDIC_VPR)

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tests/arch/common/interrupt/src/nested_irq.c:73 -#elif (defined(CONFIG_SOC_SERIES_NRF54H) || defined(CONFIG_SOC_SERIES_NRF92)) && \ +#elif (defined(CONFIG_SOC_SERIES_NRF54H) || defined(CONFIG_SOC_SERIES_NRF92)) && \ See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
#define IRQ0_LINE 14
#define IRQ1_LINE 15

Expand All @@ -79,12 +80,6 @@
#define IRQ0_LINE 19
#define IRQ1_LINE 20

#define IRQ0_PRIO 1
#define IRQ1_PRIO 2
#elif defined(CONFIG_SOC_NRF9280_CPUPPR)
#define IRQ0_LINE 14
#define IRQ1_LINE 15

#define IRQ0_PRIO 1
#define IRQ1_PRIO 2
#else
Expand All @@ -103,8 +98,8 @@
static uint32_t irq_line_0;
static uint32_t irq_line_1;

static uint32_t isr0_result;
static uint32_t isr1_result;
static volatile uint32_t isr0_result;
static volatile uint32_t isr1_result;

void isr1(const void *param)
{
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2 changes: 1 addition & 1 deletion tests/arch/common/interrupt/src/test_shared_irq.h
Original file line number Diff line number Diff line change
Expand Up @@ -29,9 +29,9 @@
test_vector[idx] = result_vector[idx]; \
} \

static uint32_t test_vector[TEST_VECTOR_SIZE] = {
static volatile uint32_t test_vector[TEST_VECTOR_SIZE] = {
};

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tests/arch/common/interrupt/src/test_shared_irq.h:34 -} \ +} -static volatile uint32_t test_vector[TEST_VECTOR_SIZE] = { -}; +static volatile uint32_t test_vector[TEST_VECTOR_SIZE] = {}; See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
static uint32_t result_vector[TEST_VECTOR_SIZE] = {
0xdeadbeef,
0xcafebabe,
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6 changes: 4 additions & 2 deletions tests/kernel/sleep/src/usleep.c
Original file line number Diff line number Diff line change
Expand Up @@ -42,8 +42,10 @@
* loaded to its comparator.
*/
#define MAXIMUM_SHORTEST_TICKS 2
#elif defined(CONFIG_SOC_NRF54H20_CPUPPR) && (CONFIG_SYS_CLOCK_TICKS_PER_SEC > 16384)
/* Similar for nRF54H20 cpuppr (RISC-V core), it has a slow CPU clock
#elif defined(CONFIG_RISCV_CORE_NORDIC_VPR) && \
(DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) < MHZ(32)) && \
(CONFIG_SYS_CLOCK_TICKS_PER_SEC > 16384)

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tests/kernel/sleep/src/usleep.c:47 -#elif defined(CONFIG_RISCV_CORE_NORDIC_VPR) && \ - (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) < MHZ(32)) && \ +#elif defined(CONFIG_RISCV_CORE_NORDIC_VPR) && \ + (DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency) < MHZ(32)) && \ See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details.
/* Similar for slow VPR cores (cpuppr, RISC-V core), it has a slow CPU clock
* compared to other cores, causing the increased overhead.
*/
#define MAXIMUM_SHORTEST_TICKS (IS_ENABLED(CONFIG_XIP) ? 8 : 4)
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