Added RS544 extended fec variants#2257
Added RS544 extended fec variants#2257pullaraogunda wants to merge 1 commit intoopencomputeproject:masterfrom
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Thanks for taking care of this change. This is required for 200G PAM4. |
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SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED_ETC : SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED_IEEE : ETC and IEEE vary only in bitmux. IEEE specifies that the 4:1 bitmux must contain 2 FEC lanes from flow-0 (lanes 0-15) and two FEC lanes from flow-1 (lanes 16-31). The ETC spec implies bitmuxing is restricted within the two sets of FEC lanes (lanes 0-15 and lanes 16-31). These two modes can interop with each other. SAI_PORT_FEC_MODE_EXTENDED_RS544_LOW_LATENCY : |
inc/saiport.h
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| SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED_ETC, | ||
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| /** Enable RS544-FEC (interleaved-CL172) IEEE 802.3df variant */ | ||
| SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED_IEEE, |
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Please look for whether we can use a name that is less ambiguous than "IEEE" here since SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED is also an IEEE spec
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Renamed SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED_IEEE to SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED_CL172. SAI_PORT_FEC_MODE_EXTENDED_RS544_INTERLEAVED confirms to IEEE 802.3bs standard (Clause 119) used for 200G/400G. |
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@pullaraogunda - could you please squash your commits and force push to ensure meta check passes? |
Signed-off-by: pullarao <pullarao.gunda@broadcom.com>
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@tjchadaga squashed the commits. Please check and integrate it |
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This PR introduces four new enums to sai_port_fec_mode_extended_t