Display name: Basic SoC Interconnect Bus
UID: ip-000019
Family: soc-interconnect
Category: interconnect
Repository: git@github.com:openecos-projects/soc-interconnect-bus.git
Upstream: internal development item from ref/正在开发的IP.docx
Current baseline: planning document snapshot from 2026-06-15
License: proprietary or undetermined
Status: planned, in development
This repository is managed as a child repository of ip-catalog.
Basic SoC interconnect bus supporting 1 to 16 AXI masters, a single AHB master, up to 32 AXI slaves, up to 32 AHB slaves, and up to 31 external APB slaves through an AHB-to-APB bridge.
The local repository currently contains metadata only. RTL, configuration schema, address mapping documentation, arbitration policy, and protocol verification evidence should be added when available.
docs/ Datasheet and provenance notes
reports/ Review, lint, simulation, or synthesis report summaries
data/ip/interconnect/ip-000019.yaml
Local metadata source:
ip.yaml