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@ydinkin ydinkin commented Dec 1, 2025

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@ydinkin ydinkin marked this pull request as ready for review December 1, 2025 23:52
@JeanRochCoulon
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I cannot merge if the PR is not rebased. Can you rebase ?

@ydinkin ydinkin force-pushed the hsv_hlv_scause_fix branch from f9551fb to 9ac7d44 Compare December 2, 2025 13:58
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ydinkin commented Dec 2, 2025

I cannot merge if the PR is not rebased. Can you rebase ?

@JeanRochCoulon I rebased, but now the formatter returns 403 for some reason. Is that related to my changes?

@JeanRochCoulon
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We must run the following command to format the RTL
verible-verilog-format --inplace $(git ls-tree -r HEAD --name-only core |grep '.sv$' |grep -v '^core/include/std_cache_pkg.sv$' |grep -v cvfpu)

@ydinkin ydinkin force-pushed the hsv_hlv_scause_fix branch 2 times, most recently from 5068622 to 14c47c6 Compare December 7, 2025 15:27
@JeanRochCoulon
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Thanks for your contribution. Associated tests are appreciated.
Can you rebase ?

openhwgroup#3147)

Remove the lsu_req_i gate so LSU-reported misaligned accesses always
propagate, covering hypervisor loads/stores that bypass translation and
were changing the exception cause (issues openhwgroup#3146, openhwgroup#3147).
Add an hsv.d regression test to reproduce the incorrect
misaligned store exception cause from issue openhwgroup#3147.
Add an hlv.d regression test to reproduce the incorrect
misaligned load exception cause from issue openhwgroup#3146.
@ydinkin
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ydinkin commented Dec 10, 2025

Thanks for your contribution. Associated tests are appreciated. Can you rebase ?

Thanks, rebased :)

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👋 Hi there!

This pull request seems inactive. Need more help or have updates? Feel free to let us know. If there are no updates within the next few days, we'll go ahead and close this PR. 😊

@github-actions github-actions bot added the Status:Stale Issue or PR is stale and hasn't received any updates. label Jan 10, 2026
@JeanRochCoulon JeanRochCoulon removed the Status:Stale Issue or PR is stale and hasn't received any updates. label Jan 13, 2026
@JeanRochCoulon
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Sorry for the delay, can you rebase (again) or give me the right to write your branch ?

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2 participants