[NPUW] Fix failsafe port mapping for imported NPUW-cached models

[OrestChura]

Details:

• map failsafe wrapper ports to inner compiled-model ports by (is_output, idx)
  (implemented in a new method ov::npuw::failsafe::InferRequest::map_to_inner_port_locked())

  • the idea is to add the logic similar to ov::npuw::accuracy_checked::InferRequest

• use the mapped inner ports in infer(), get_tensor(), and set_tensor()

• add require_port() helper for ov::npuw::failsafe::InferRequest

• Add regression test for failsafe imported-port remapping which

  • Simulates a restored inner compiled model whose input and output names differ from the outer failsafe wrapper model.
  • Verifies that failsafe still accepts outer set_tensor calls, runs infer, and returns the expected tensors and values.
  • Ensures port mapping relies on input/output side and index, not reconstructed friendly names.
  • Guards against the cached model regression where a restored inner request fails with “Cannot find tensor for port ...”.

Tickets:

AI Assistance:

• AI assistance used: yes
  • debugging the problem
  • generating proper fix
  • generating the test
  • generating the comments and descriptions

[dmatveev]

Simulates a restored inner compiled model whose input and output names differ from the outer failsafe wrapper model.

So how can this be possible? They're all compiled from the same source IR?