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    8 repositories

    • tacit_decoder

      Public
      Rust
      •1•5•0•1•Updated Feb 4, 2026Feb 4, 2026

    • tacit

      Public
      Timestamp Annotated Core Instruction Trace
      Scala
      •1•1•0•0•Updated Jan 26, 2026Jan 26, 2026

    • chipyard

      Public
      An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
      Scala
      •
      BSD 3-Clause "New" or "Revised" License
      •813•0•0•0•Updated Dec 2, 2025Dec 2, 2025

    • riscv-isa-sim

      Public
      Spike, a RISC-V ISA Simulator
      C
      •
      Other
      •1k•0•0•0•Updated Oct 30, 2025Oct 30, 2025

    • Speckle

      Public
      A wrapper for the SPEC CPU2006 benchmark suite.
      Shell
      •58•0•0•0•Updated Oct 16, 2025Oct 16, 2025

    • spike-devices

      Public
      Collection of device models for spike
      C++
      •10•1•0•0•Updated Oct 9, 2025Oct 9, 2025

    • tacit_driver

      Public
      Linux driver for tacit
      C
      •0•0•0•0•Updated Oct 2, 2025Oct 2, 2025

    • speedscope

      Public
      🔬 A fast, interactive web-based viewer for performance profiles.
      TypeScript
      •
      MIT License
      •309•0•0•0•Updated Sep 23, 2025Sep 23, 2025