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    89 repositories

    • riscv-zilsd

      Public archive
      Zilsd (Load/Store Pair for RV32) Fast-Track Extension
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •6•13•0•2•Updated Mar 6, 2026Mar 6, 2026

    • riscv-CMOs

      Public archive
      HTML
      •
      Creative Commons Attribution 4.0 International
      •12•89•8•0•Updated Aug 26, 2025Aug 26, 2025

    • policies

      Public archive
      RISC-V Policies
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•0•3•2•Updated Feb 20, 2025Feb 20, 2025

    • security

      Public archive
      RISC-V Security HC admin repo
      3•17•0•0•Updated Jan 7, 2025Jan 7, 2025

    • configuration-structure

      Public archive
      RISC-V Configuration Structure
      Python
      •
      Creative Commons Attribution 4.0 International
      •19•41•14•5•Updated Oct 30, 2024Oct 30, 2024

    • riscv-smcdeleg-ssccfg

      Public archive
      Supervisor Counter Delegation Architecture Extension
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•2•1•0•Updated Jul 22, 2024Jul 22, 2024

    • isa-infra

      Public archive
      Group administration repository for Tech: ISA Infrastructure Horizontal Committee
      Creative Commons Attribution 4.0 International
      •0•0•0•0•Updated May 2, 2024May 2, 2024

    • documentation

      Public archive
      Group administration repository for SIG: Documentation
      Creative Commons Attribution 4.0 International
      •0•1•0•0•Updated Apr 11, 2024Apr 11, 2024

    • riscv-zacas

      Public archive
      riscv-zacas created from docs-spec-template template
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •6•9•1•1•Updated Mar 21, 2024Mar 21, 2024

    • riscv-smcntrpmf

      Public archive
      Cycle & Instret Privilege Mode Filtering Architecture Extension
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•2•3•1•Updated Mar 21, 2024Mar 21, 2024

    • riscv-svadu

      Public archive
      The Svadu extension adds support and CSR control for hardware updating of PTE A/D bits.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •2•7•1•0•Updated Mar 21, 2024Mar 21, 2024

    • riscv-zicond

      Public archive
      The ISA specification for the ZiCondOps extension.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •6•19•2•2•Updated Mar 21, 2024Mar 21, 2024

    • riscv-indirect-csr-access

      Public archive
      Smcsrind/Sscsrind is an ISA extension that extends the indirect CSR access mechanism originally defined as part of the Smaia/Ssaia extensions, in order to make …
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •1•3•2•1•Updated Mar 21, 2024Mar 21, 2024

    • riscv-v-spec

      Public archive
      Working draft of the proposed RISC-V V vector extension
      Assembly
      •
      Creative Commons Attribution 4.0 International
      •281•1.1k•121•8•Updated Mar 17, 2024Mar 17, 2024

    • riscv-code-size-reduction

      Public archive
      Python
      •34•148•16•0•Updated Feb 29, 2024Feb 29, 2024

    • control-transfer-records

      Public archive
      Group administration repository for SIG: Control Transfer History
      Creative Commons Attribution 4.0 International
      •0•1•1•0•Updated Feb 15, 2024Feb 15, 2024

    • riscv-zfinx

      Public archive
      Creative Commons Attribution 4.0 International
      •5•12•1•0•Updated Feb 15, 2024Feb 15, 2024

    • risc-v-getting-started-guide

      Public archive
      The official RISC-V getting started guide
      CSS
      •
      Creative Commons Attribution 4.0 International
      •55•202•11•16•Updated Feb 12, 2024Feb 12, 2024

    • riscv-acpi

      Public archive
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •11•13•2•1•Updated Sep 19, 2023Sep 19, 2023

    • riscv-time-compare

      Public archive
      TeX
      •
      Creative Commons Attribution 4.0 International
      •2•5•1•1•Updated Sep 6, 2023Sep 6, 2023

    • riscv-platform-specs

      Public archive
      RISC-V Profiles and Platform Specification
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •38•116•9•5•Updated Sep 6, 2023Sep 6, 2023

    • ras-terms-defs

      Public archive
      Group administration repository for Tech: RAS Terms and Definitions
      Creative Commons Attribution 4.0 International
      •0•0•0•0•Updated Aug 22, 2023Aug 22, 2023

    • rvm-csi

      Public archive
      Group administration repository for SIG: RISC-V Common Software Interface (RVM-CSI)
      Python
      •
      Creative Commons Attribution 4.0 International
      •2•9•1•0•Updated Jul 27, 2023Jul 27, 2023

    • riscv-gcc

      Public archive
      GNU General Public License v2.0
      •276•372•66•7•Updated May 22, 2023May 22, 2023

    • blockchain

      Public archive
      Blockchain SIG Community
      Creative Commons Attribution 4.0 International
      •0•4•0•0•Updated Apr 18, 2023Apr 18, 2023

    • riscv-zawrs

      Public archive
      The repo will be used to hold the draft Zawrs (fast-track) extension and to make releases for reviews.
      Makefile
      •
      Creative Commons Attribution 4.0 International
      •6•7•0•0•Updated Mar 15, 2023Mar 15, 2023

    • automotive

      Public archive
      Group administration repository for SIG: Automotive
      Creative Commons Attribution 4.0 International
      •2•2•0•0•Updated Sep 21, 2022Sep 21, 2022

    • riscv-tee

      Public archive
      Makefile
      •12•38•4•1•Updated Aug 6, 2022Aug 6, 2022

    • unified-discovery

      Public archive
      TeX
      •
      Creative Commons Attribution 4.0 International
      •0•1•0•0•Updated Jul 8, 2022Jul 8, 2022

    • riscv-binutils-gdb

      Public archive
      RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
      C
      •
      GNU General Public License v2.0
      •236•151•20•4•Updated Jul 7, 2022Jul 7, 2022
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