Skip to content
View oskarwires's full-sized avatar

Highlights

  • Pro

Block or report oskarwires

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. sdram_controller sdram_controller Public

    High-Speed SystemVerilog SDRAM Controller

    SystemVerilog 3

  2. uart2 uart2 Public

    SystemVerilog UART transciever

    SystemVerilog 1

  3. Lab2-SigGen Lab2-SigGen Public

    C++

  4. gtkwave gtkwave Public

    Forked from gtkwave/gtkwave

    GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.

    C

  5. aca_annealer aca_annealer Public

    The source code for my simulated annealer for ACA coursework

    Python

  6. SmallVector SmallVector Public

    C++