Enable SPL for STM32F1

[maxgerhardt]

Enables Simple Peripheral LIbrary (SPL) framework support for STM32F1.

Uses the most recent SPL F1 package version 3.6.0 from here.

The SPL framework needs the boards to have an identifying macro like STM32F10X_MD for "medium density" device. Instead of computing and adding this to ~50 board files, a on-the-fly identification is made based on chip name and flash size, like the reference manual wants it.

Rewrites the spl-blink example to use the SysTick for delay and adds the F1 code to it.

The package.json was modified to repoint framework-spl to https://github.com/maxgerhardt/pio-framework-spl-stm32.git, which is the latest PlatformIO-provided framework-spl on top of the SPL F1 files. So CI should go through, but this change should be remade by uploading the updated package to the registry and using that in the package.json.

Note: build.core, which evaluated to stm32 for all previous SPL supported boards, has been replaced with build.mcu[0:5], which evaluates to the same. However, STM32F1 maple boards like maple.json have "maple" as the value here, which breaks the build, hence it was changed.

See example project at https://github.com/maxgerhardt/pio-stm32f1-spl-test.

[pr1metine]

LGTM lol

[maxgerhardt]

I allowed myself to make a tiny addition to the SPL framwork with the option PIO_FRAMEWORK_SPL_HSE_IN_BYPASS_MODE (maxgerhardt/pio-framework-spl-stm32@5c2d987). The clock setup code of the SPL framwork always wants to use HSE in crystal oscaillator mode (OSC-IN + OSC-OUT), but for Nucleos that get the 8MHz HSE from the MCO of the ST-Link (direct square wave into OSC-IN), the HSE should be set in BYPASS mode (no need to drive it like a crystal oscillator and leave OSC-OUT alone).

Further I've removed the RCC_Deinit(); from the example, as this destroyed the clock settings set earlier in the system startup code. Also explicitly added the Nucleo's LED pin and platformio.ini environment.

Tested on real hardware and works fine.

[WessellUrdata]

I'm getting the sbrkr.c:(.text._sbrk_r+0xc): undefined reference to '_sbrk' error when using sprintf with this.

Building in release mode
arm-none-eabi-gcc -o .pio/build/nucleo_f103rb/firmware.elf -T /home/tim/.platformio/packages/framework-spl/platformio/ldscripts/STM32F103RB_DEFAULT.ld -Os -Wl,--gc-sections,--relax -mthumb -mcpu=cortex-m3 -nostartfiles .pio/build/nucleo_f103rb/src/init.o .pio/build/nucleo_f103rb/src/main.o -L/home/tim/.platformio/platforms/ststm32@src-cae1d20a1215d2080281f02fb9356107/ldscripts -L.pio/build/nucleo_f103rb -Wl,--start-group -lc -lgcc -lm -lstdc++ .pio/build/nucleo_f103rb/libFrameworkCMSISVariant.a .pio/build/nucleo_f103rb/libFrameworkCMSISCore.a .pio/build/nucleo_f103rb/libFrameworkSPL.a -Wl,--end-group
/home/tim/.platformio/packages/toolchain-gccarmnoneeabi/bin/../lib/gcc/arm-none-eabi/7.2.1/../../../../arm-none-eabi/lib/thumb/v7-m/libc.a(lib_a-sbrkr.o): In function `_sbrk_r':
sbrkr.c:(.text._sbrk_r+0xc): undefined reference to `_sbrk'
collect2: error: ld returned 1 exit status
*** [.pio/build/nucleo_f103rb/firmware.elf] Error 1

[maxgerhardt]

The SPL builder code is by-default not linking against newlibnano which would provide this function, so you have to do a little addititon yourself like I did here:

In the platformio.ini, add

extra_scripts = add_nanolib.py

in the root of the project (same level as platformio.ini), create a new file add_nanolib.py

Import("env")
env.Append(LINKFLAGS=["--specs=nosys.specs", "--specs=nano.specs"])

Keep in mind for printf() to work you still have to overwrite the write() method to push the data into the UART data registers same like https://electronics.stackexchange.com/a/279945 shows.

[jmjoy]

This PR is very useful.

[jmjoy]

spl is repeated.

[jmjoy]

Why here change version to an url?

[maxgerhardt]

Because the platformio/framework-spl@~2.10201.0 is 6 years old and doesn't even contain an stm32f1 folder with the needed files.

[josedelinux]

yeah, we need SPL for stm32f1, badly