dev_gmsl: [RSDEV-13503][RSDEV-13505][D585][GMSL] Add tunnel RGB-right on VC4 - #599
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Expose the D585 2C RGB-right stream as VC4 while preserving the existing VC0-VC3 mapping. Gate the additional node by the product PID and constrain 2C image profiles to the supported 30 FPS ceiling. Allow the MAX96724 Link-A tunnel to share one physical pipe across logical VCs with reference-counted lifetime. Append the VC4 VI/NVCSI endpoints to the D5x tunnel overlay without changing the pixel-mode path. Signed-off-by: Shengyong Zhou <shengyong.zhou@realsenseai.com>
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Summary
Port the D5x tunnel-mode RGB-right support from #576 onto
dev_gmsl_merge.The change does not modify the MAX96712 path, pixel-mode overlays, or generic VI/NVCSI implementation.
Compatibility
The branch is based directly on
dev_gmsl_merge. A three-way merge check against PR #592 reports a clean automatic merge; stacking is not required.On the Jetson67 3C device (PID
0x0c08), the deployed driver rejected theDUALRGB_RIGHTinstance with-ENODEVand preserved the existing node mapping:/dev/video0/dev/video1/dev/video2/dev/video3/dev/video4/dev/video5/dev/video6For D585 2C, RGB-right is added on VC4 after the existing channels. Numeric
/dev/videoNvalues are registration-order details rather than a stable userspace ABI; userspace should resolve the stable RealSense links or media entities.Validation
5.15.185-tegra6ca0568orin-gmsl verify --require-loadedpassedd4xx,max96717, andmax96724loaded with matching vermagic