v0.6.0

• Collect ADDR_ENDP* registers into an array
• Add host_poll_interval field to EP_CONTROL registers
• Add EPX_CONTROL register to USBCTRL_DPRAM
• Rebuild with svdtools 0.3.9
• Rebuild with svd2rust 0.31.5
• Rebuild with form 0.11.1
• Add VSEL_A field to VREG register

v0.5.0

• Rebuild with svd2rust 0.29.0, svdtools 0.3.0 (rust version)
• Add docs.rs metadata to include documentation gated by the rt feature
• Add enum for SPI frame format
• Update to SVD from pico-sdk 1.5.1
• Bump dependency on vcell to version 0.1.3

v0.4.0

• Added all possible variants for DREQ enum in CH*_CTRL*
• Update rustdoc to clarify DMA CHAIN_TO behaviour
• Add 6 unused interrupts as sw[0..5]_irq under new SW_IRQ peripheral
• Pin to specific svdtools to avoid spontaneous breakage
• Disable clippy warning for derive_partial_eq_without_eq
• Update to SVD from pico-sdk 1.4.0

v0.3.0

• Arrayify spinlock 0-31

v0.2.1

• Rebuild with svd2rust 0.2.0
• Improvements to comment formatting from newer svd2rust

v0.2.0

• Update source SVD to pico-sdk 1.3.0
• Remove patches that were no longer required thanks to new SVD file.
• Arrayify procX_intX registers in IO_BANK1. This is a breaking change.

v0.1.5

• Update cortex-m-rt to 0.7.0
• Fix cargo license declaration
• arrayify USB endpoint registers
• add USB line state variants as enum

v0.1.4

• Removed broken register (as per errata)
• Fixed lineendings in documentation
• Update svd2rust to 0.19.0
• Made SIE_STATUS CONNECTED read-write
• Fixed update script for OSX
• Changed SIO SPINLOCKs to read-write

v0.1.3

• Update source SVD to pico-sdk 1.2.0
• Cluster PWM channels
• Bump cortex-m dep to 0.7.3

v0.1.2

• Switched GPIO for IO_BANK and QSPI_BANK to be arrays instead.
• Change BUFF_STATUS access to read-write
• Re-clustered IO_QSPI. Fixed naming to remove double underscore
• Renamed GPIO_QSPI_[STAT,CTRL] -> GPIO_[STAT,CTRL]
• Convert DMA chunnels to a list of register clusters