Tachyon Hash - #329
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rurban
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Feb 26, 2026
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Looks good. I'll test it in the next days
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Thanks for the quick review and approval. Added a follow-up commit to fix the CI failures on aarch64, armv7, and macOS arm64. The AES-NI and AVX-512 backends are now only compiled when AES_FOUND is true and the processor family is x86 — same pattern as t1ha in this repo. I don't have ARM or Apple Silicon hardware to test natively, so if anything comes up during your testing I'm happy to adjust. |
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This PR adds Tachyon, a 256-bit hash function I have been working on. The algorithm was designed primarily for x86-64 with AVX-512+VAES and AES-NI — it does not target ARM or other architectures, though a portable software fallback is included. It uses an 8-lane accumulator state (4096-bit bulk path), a Davies-Meyer feed-forward, and a butterfly network for diffusion. The short-path (<64 bytes) uses a dedicated 4-lane AES-NI path.
The design is cryptographically hardened but has not been formally audited and should be considered highly experimental. It is not intended as a drop-in replacement for cryptographic hash functions. The primary implementation is in Rust. This PR includes the C reference implementation, cross-verified to produce identical output on all three backends.
Verification value: 0xE9BBF229
Performance on Ryzen 7 7700X (AVX-512+VAES) C Implementation:
Bulk 256 KiB: ~9700 MiB/sec (~2.2 bytes/cycle)
Small keys: ~205 cycles/hash
Full SMHasher results (C + Rust, incl. --extra):
https://github.com/byt3forg3/Tachyon/tree/main/verification/.results