Draft
Conversation
Add vendor module and tests for Qualcomm Hexagon HVX (Hexagon Vector eXtension) SIMD support. HVX provides wide vector operations in either 64-byte (512-bit) or 128-byte (1024-bit) mode. Note: u8x128/i8x128 types are not included because portable-simd currently limits lane count to 64 (bitmask operations use u64). In 128-byte HVX mode, u8x64 maps to a half-vector (512-bit).
Author
|
Successor to #500 Note that llvm/llvm-project#182520 causes some problems in some use cases. Hopefully the fix lands soon to make it into 22.x and then into Rust. |
11 tasks
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Add vendor module and tests for Qualcomm Hexagon HVX (Hexagon Vector eXtension) SIMD support. HVX provides wide vector operations in either 64-byte (512-bit) or 128-byte (1024-bit) mode.
Note: u8x128/i8x128 types are not included because portable-simd currently limits lane count to 64 (bitmask operations use u64). In 128-byte HVX mode, u8x64 maps to a half-vector (512-bit).