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498 | 498 | "CFG_MSGOUT_UBX_MON_MSGPP_UART1": (0x20910197, U1), |
499 | 499 | "CFG_MSGOUT_UBX_MON_MSGPP_UART2": (0x20910198, U1), |
500 | 500 | "CFG_MSGOUT_UBX_MON_MSGPP_USB": (0x20910199, U1), |
| 501 | + "CFG_MSGOUT_UBX_MON_PT2_I2C": (0x20910209, U1), |
| 502 | + "CFG_MSGOUT_UBX_MON_PT2_SPI": (0x2091020D, U1), |
| 503 | + "CFG_MSGOUT_UBX_MON_PT2_UART1": (0x2091020A, U1), |
| 504 | + "CFG_MSGOUT_UBX_MON_PT2_UART2": (0x2091020B, U1), |
| 505 | + "CFG_MSGOUT_UBX_MON_PT2_USB": (0x2091020C, U1), |
501 | 506 | "CFG_MSGOUT_UBX_MON_RF_I2C": (0x20910359, U1), |
502 | 507 | "CFG_MSGOUT_UBX_MON_RF_SPI": (0x2091035D, U1), |
503 | 508 | "CFG_MSGOUT_UBX_MON_RF_UART1": (0x2091035A, U1), |
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678 | 683 | "CFG_MSGOUT_UBX_NAV_COV_UART1": (0x20910084, U1), |
679 | 684 | "CFG_MSGOUT_UBX_NAV_COV_UART2": (0x20910085, U1), |
680 | 685 | "CFG_MSGOUT_UBX_NAV_COV_USB": (0x20910086, U1), |
| 686 | + "CFG_MSGOUT_UBX_NAV_DAHEADING_I2C": (0x209103DF, U1), |
| 687 | + "CFG_MSGOUT_UBX_NAV_DAHEADING_SPI": (0x209103E3, U1), |
| 688 | + "CFG_MSGOUT_UBX_NAV_DAHEADING_UART1": (0x209103E0, U1), |
| 689 | + "CFG_MSGOUT_UBX_NAV_DAHEADING_UART2": (0x209103E1, U1), |
| 690 | + "CFG_MSGOUT_UBX_NAV_DAHEADING_USB": (0x209103E2, U1), |
681 | 691 | "CFG_MSGOUT_UBX_NAV_DGPS_I2C": (0x20910074, U1), |
682 | 692 | "CFG_MSGOUT_UBX_NAV_DGPS_SPI": (0x20910078, U1), |
683 | 693 | "CFG_MSGOUT_UBX_NAV_DGPS_UART1": (0x20910075, U1), |
|
1005 | 1015 | "CFG_NAVMASK_SV_MASK_GPS": (0x50180013, X8), |
1006 | 1016 | "CFG_NAVMASK_SV_MASK_NAVIC": (0x50180018, X8), |
1007 | 1017 | "CFG_NAVMASK_SV_MASK_QZSS": (0x50180017, X8), |
| 1018 | + "CFG_NAVHPG_CORR_CONV_OSR": (0x30140062, X2), |
1008 | 1019 | "CFG_NAVSPG_ACKAIDING": (0x10110025, L), |
1009 | 1020 | "CFG_NAVSPG_CONSTR_ALT": (0x401100C1, I4), |
1010 | 1021 | "CFG_NAVSPG_CONSTR_ALTVAR": (0x401100C2, U4), |
1011 | 1022 | "CFG_NAVSPG_CONSTR_DGNSSTO": (0x201100C4, U1), |
1012 | 1023 | "CFG_NAVSPG_CONSTR_DGNSSTO_SCALE": (0x201100C5, U1), |
1013 | 1024 | "CFG_NAVSPG_CONSTR_PROPLIMIT": (0x401100C3, U4), |
1014 | | - # "CFG_NAVSPG_DAHEADING_OFFSET": (0x40??????, U4), |
| 1025 | + "CFG_NAVSPG_DAHEADING_OFFSET": (0x401100E4, U4), # not in docs, got from ucenter2 |
1015 | 1026 | "CFG_NAVSPG_DCMMODE": (0x20110023, E1), |
1016 | 1027 | "CFG_NAVSPG_DYNMODEL": (0x20110021, E1), |
1017 | 1028 | "CFG_NAVSPG_FIXMODE": (0x20110011, E1), |
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1135 | 1146 | "CFG_SEC_CFG_LOCK": (0x10F60009, L), |
1136 | 1147 | "CFG_SEC_CFG_LOCK_UNLOCKGRP1": (0x30F6000A, U2), |
1137 | 1148 | "CFG_SEC_CFG_LOCK_UNLOCKGRP2": (0x30F6000B, U2), |
| 1149 | + "CFG_SEC_COM_SIGN_RATE": (0x30F60061, U2), |
| 1150 | + "CFG_SEC_COM_SIGN_SCHEME": (0x30F60060, E2), |
1138 | 1151 | "CFG_SEC_JAMDET_SENSITIVITY_HI": (0x10F60051, L), |
1139 | 1152 | "CFG_SEC_SPOOFDET_SIM_SIG_DIS": (0x10F6005D, L), |
1140 | 1153 | "CFG_SFCORE_HNR_RATE": (0x2008001A, U1), |
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