PCF85053A DRIVER FOR EMBEDDED LINUX
The PCF85053A is a modern, low-power CMOS Real-Time Clock (RTC) and calendar chip from NXP Semiconductors (released around 2023, with datasheets updated as recently as 2025). It's specifically designed for applications that need reliable timekeeping, battery backup, and some extra features like dual I²C access and non-volatile storage — especially in servers, industrial systems, bootable CPUs, and battery-powered or unattended devices. Key Features
Ultra-low power consumption — Ideal for always-on timekeeping (even when main power is off). Automatic battery switch-over — Seamlessly switches to VBAT (battery supply) when VDD (main power) drops. Voltage ranges: VDD: 1.7 V to 3.6 V VBAT: 1.55 V to 3.6 V (covers common coin-cell batteries like CR2032)
Two independent I²C interfaces (both up to 400 kHz): Primary I²C bus: Full read/write access to RTC registers and SRAM. Secondary I²C bus: Can also read/write most registers (enabled/controlled via primary bus settings). This dual-bus design is useful in systems with separate management controllers (e.g., BMC in servers) or isolated domains.
128 bytes of battery-backed SRAM: Non-volatile storage (survives power loss via battery). Can store configuration data, logs, random seeds, etc. Clearable via a dedicated RTC_CLR# pin.
Crystal oscillator: Integrated load capacitors — no external caps needed. Configurable CL (crystal load): 6 pF, 7 pF, or 12.5 pF. Programmable offset register for fine time accuracy calibration (compensates crystal aging/temperature drift).
Time & Calendar: Seconds, minutes, hours, day, date, month, year (with century bit). Supports BCD or binary mode. 12-hour or 24-hour format. Daylight saving time (DST) support. Compatible with older MC146818B register layout (helps with legacy server/software compatibility).
Alarm function — Programmable alarm with interrupt output (active-low ALRT pin). Clock output — Can output 32.768 kHz or other divided frequencies. Interrupt/timestamp — Active-low interrupt output; supports automatic timestamp on events. Package: Tiny HVSON12 (3 × 3 × 0.85 mm, 0.5 mm pitch) — very compact. Temperature range: -40 °C to +85 °C.
Typical Applications
Servers and computers needing precise boot-time timekeeping (hence "bootable CPU RTC"). Network appliances, industrial controllers, white goods. Any system with long unattended runtime or dual I²C domains (e.g., main CPU + management processor). Battery-powered IoT/embedded devices where you want extra SRAM without another chip.
Comparison to Similar NXP RTCs
PCF85063A — Simpler tiny RTC, single I²C, no dual bus, no 128-byte SRAM. PCF85263A — Very feature-rich (timestamp on power events, more alarms, etc.), but usually single I²C. PCF85053A stands out mainly for the dual I²C buses + battery-backed SRAM combo, making it great for server/BMC or secure/boot scenarios.
root@machine:~# dmesg | grep rtc $ rtc-pcf85053a 12-006f: registered as rtc0 $ rtc-pcf85053a 12-006f: setting system clock to 2026-03-16T14:27:55 UTC (1773671275)