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17c2303
feat: add cuda calibration functions and code optimize
WhoIsYu Sep 26, 2025
06bd28c
fix: Strengthen Rope logic
Oct 20, 2025
66e9a0b
fix: add missing parameters
WhoIsYu Oct 21, 2025
0582dcd
fix: layergroup error when strategy 2
Heng2024 Oct 22, 2025
11205ef
fix: op could be inplace when it is the only user in group
Oct 21, 2025
2825f98
feat: add janus
hengyang123 Oct 11, 2025
07c2dc2
fix: correct errors in former shape_pat code
Oct 22, 2025
5262818
fix: support negative offset of sliceOp in CV18xx
dgyx Oct 22, 2025
92c4117
fix: [MLIR-670]
tpu-mlir-vis-tools Oct 22, 2025
c319c39
fix: disable lgcache when no_save
Heng2024 Oct 24, 2025
5e709af
fix: fix the fused_op split order in cali
Oct 24, 2025
ab3ad6a
fix: Fix ppl integration issues
neocats Oct 24, 2025
a61ba93
feat: Create a rearrangement logical operation
Oct 23, 2025
77eeff7
fix: tpulang no_save compile error
charlesxzb Oct 24, 2025
38ae3fb
feat: Support the codegen of bm1690 ops using ppl
neocats Oct 24, 2025
2675dbe
refactor: Qwen3VL use static vit
HarmonyHu Oct 24, 2025
504f27a
fix: GELU in 1688 should be f32
HarmonyHu Oct 26, 2025
f5fab72
fix: cv184x Gelu does bf16 lowering
charlesxzb Oct 28, 2025
30d8dad
fix: bm1684 not support layergroup multi-branch case
Oct 30, 2025
e955c45
fix: remove print, fix fp layers take effect in search qtable, and re…
WhoIsYu Oct 27, 2025
ce54fe1
fix: update manual
WhoIsYu Oct 30, 2025
269c4a5
fix: fix bugs in final qtable
Oct 30, 2025
b6656c2
fix: fix bcbinary rearrangement bug
Oct 27, 2025
683d212
fix: fix bug of tune_num=0 in search qtable
Oct 31, 2025
4335376
refactor: FAttention add keep_dims attr
HarmonyHu Oct 29, 2025
217f193
docs: upload quant.drawio
wwwwwu64 Oct 27, 2025
92ae111
fix: bug fix for the interp operator in the DHW dimension in 5 dimens…
Oct 29, 2025
9f29863
fix: mars3 global depthwse deconv bug
Oct 30, 2025
f972dcf
chore: switch reg device to run llm code review
charlesxzb Nov 4, 2025
d109f9c
fix: io needs to be placed first in io_alone mode
charlesxzb Nov 6, 2025
c4ea2a4
fix: fix fattn head slice error
HarmonyHu Nov 6, 2025
9af4d06
fix: update bm1684x/bm1688 backend
HarmonyHu Nov 9, 2025
80127c4
fix: remove 8ch interleave code
HarmonyHu Nov 3, 2025
d642b63
fix: avoid memory leak when repeat call to invoke
WhoIsYu Nov 4, 2025
5a6bbab
fix: fix the conv bug in bias_correction
Nov 4, 2025
a3da6f0
fix: [MLIR-693] opt qtable, add function to search qtable based on ex…
WhoIsYu Nov 6, 2025
b96d471
fix: fix bugs of sq and smc
wwwwwu64 Nov 3, 2025
4b4738a
fix: tpulang no_save mode block all log prob
charlesxzb Oct 28, 2025
e3974d5
fix: TpuReshapeReorderPattern bug
charlesxzb Nov 7, 2025
9c8b771
fix: mutil_defrom_attn for more case
Nov 10, 2025
096e115
fix: cv184x interp input coord use FP32/UINT32
Nov 6, 2025
96ad53a
fix: [CV184XSDK-721]
tpu-mlir-vis-tools Oct 31, 2025
e6b0203
feat: jira ID [CV184X-766]
Nov 7, 2025
64419e6
fix: align dtype in set_data()
Nov 13, 2025
4bdb29a
feat: add more info in AddPostprocess
Nov 12, 2025
00e2317
fix: inplaceOp liveRange
Nov 12, 2025
37177ac
feat: Add same_addr param in model_deploy
24octopus Nov 12, 2025
5fe4773
feat: Adapt CV184x LSTM BF16
Nov 13, 2025
5a0ff08
fix: ReduceOp not support dynamic local codgen
Nov 12, 2025
ec679ff
fix: tpulang bug fix:
Oct 30, 2025
12fb1f5
fix: no_save error in afterlayergroup pass
charlesxzb Nov 13, 2025
bdf5fb7
fix: add LSTM cv184x test_onnx
Nov 14, 2025
4186fef
feat: add new rewriter pattern
Nov 3, 2025
fd0207f
fix: dynamic codegen bug of UpSample
Nov 17, 2025
a530280
fix: more op support dynamic mlir inference
Nov 3, 2025
7956a08
feat: add HdimIsBatch mm pattern cases
tpu-mlir-vis-tools Nov 14, 2025
e34afc0
fix: disable group_before.txt
Heng2024 Oct 24, 2025
4aadfba
feat: support bm1690e
Mar 27, 2025
aa6825f
feat: apply qtable to more search functions
WhoIsYu Nov 10, 2025
0901bfc
fix: add missing shape parameter in set_tensor
WhoIsYu Nov 18, 2025
4e70627
feat: update manual on calibration
WhoIsYu Nov 19, 2025
007c0be
fix: bm1684 conv failed prob
charlesxzb Nov 19, 2025
3f562b8
feat: support auto-round for llm
HarmonyHu Nov 19, 2025
bfcd3a5
test: add bm1690e op and model test
charlesxzb Nov 20, 2025
2d5f0e5
feat: add addr_mode 'in_reuse'
Nov 13, 2025
e5384c4
fix: sample_head use dynamic
HarmonyHu Nov 20, 2025
3086fd0
fix: handle to all zero tensor
WhoIsYu Nov 21, 2025
455dddc
feat: manual update
WhoIsYu Nov 21, 2025
b265e4f
fix: change for igev pass
Nov 19, 2025
f469e55
fix: fix ppl cv184x issue
neocats Oct 28, 2025
b605a21
docs: update release record
charlesxzb Nov 25, 2025
7fef01f
fix: fix cv184x codgen issue
neocats Nov 25, 2025
7e07def
fix: avoid inf match in op name
WhoIsYu Nov 26, 2025
6bf1f98
feat: add profile test regression
Nov 24, 2025
a8ee861
feat: remove not used sophgo-mq version
WhoIsYu Nov 18, 2025
115c206
feat: support lightstereo
Nov 26, 2025
79b0c17
feat: qwen3vl support multi vit
HarmonyHu Nov 26, 2025
a0e5644
fix: io address should assign firstly for io_alone
HarmonyHu Nov 27, 2025
593528c
feat: support multi prefill input length
HarmonyHu Nov 28, 2025
bd54ca3
refactor: uniform gen_mlirs and compiles in llm
HarmonyHu Dec 1, 2025
812fd67
refactor: make weights 4K aligned in bmodel file
HarmonyHu Dec 1, 2025
37f5c80
fix: [BM1684X-8119]
tpu-mlir-vis-tools Nov 25, 2025
b3ff967
fix: [MLIR-660]
Nov 21, 2025
5a78925
feat: llm support compressed-tensors mode
HarmonyHu Dec 1, 2025
ef85193
fix: [CV186AHDEV-519] reference inference overflow if use F16
WhoIsYu Nov 27, 2025
c32afcf
feat: inference mlir with cuda
WhoIsYu Nov 25, 2025
0ae1b10
fix: update bm1690e backend
Dec 2, 2025
c09e0b6
feat: add out_fixed mode in bmodel_checker
Dec 3, 2025
bc50baa
feat: make all binary 4K aligned in bmodel file
HarmonyHu Dec 4, 2025
903c080
feat: model_tool can refresh bmodel to 4k aligned
HarmonyHu Dec 5, 2025
c5d7cc0
fix: fix LSTM cv184x int8 bug
Dec 3, 2025
c4b88d6
feat: MLIR-729
Dec 5, 2025
c71bf2d
fix: time_fixed_subnet error
Dec 5, 2025
cb2bade
fix: add chip support data types
WhoIsYu Dec 8, 2025
085f559
fix: postprocess shape
Dec 9, 2025
e9b738c
fix: tensor mul vector of matmul not work on this pass
WhoIsYu Dec 9, 2025
447af21
chore: update libbmrt
Korbin-chen Dec 8, 2025
e94f184
feat: add more op to GROUP_SMALL_C
Dec 8, 2025
3f1d70d
fix: vit models deploy failed in w4a16/w8a16 mode
wwwwwu64 Dec 5, 2025
98cfbff
refactor: refine lora support
HarmonyHu Nov 24, 2025
2cb943a
feat: layer group method optimize
Dec 9, 2025
fba100a
feat: support contiguous_halves rope mode
Dec 9, 2025
95062df
refactor: refine lora path
HarmonyHu Dec 10, 2025
39f1921
fix: depthwise_asym_quant_data_split's bug
Dec 10, 2025
f9ff84b
refactor: lora bmodel use io_alone
HarmonyHu Dec 15, 2025
408cb00
feat: add debugger=5
Oct 20, 2025
c206ba6
fix: bm1690e resnet50 e5m2 cmp failed
charlesxzb Dec 16, 2025
05452d0
feat: dynamic group quantization for bm1684x tpu.mlir
wwwwwu64 Nov 19, 2025
336ae9c
fix: [MLIR-742] add param to force quant input/output int8/uint8
WhoIsYu Dec 16, 2025
ffa7eaa
feat: enhance custom ops param
WhoIsYu Dec 17, 2025
28e65e5
chore: remove sensitive words
charlesxzb Dec 17, 2025
6779299
fix: rcnn deploy failed prob
charlesxzb Dec 18, 2025
7645949
fix: [MLIR-730]
Dec 15, 2025
69c7a10
test: Add case PixelNorm3 for model validation
Dec 17, 2025
22b227f
chore: update runtime lib:
Korbin-chen Dec 19, 2025
47e1e83
feat: cuda inference
WhoIsYu Dec 8, 2025
3ea6b2e
fix: backend compile
Dec 25, 2025
04cf139
feat: generalize operator extraction and test script for unit testing
Zane-Jiang Dec 25, 2025
0d2560d
fix: remove redundant quotation marks during type convert .
Zane-Jiang Dec 25, 2025
9199158
chore: upate libbmrt:
Korbin-chen Dec 10, 2025
e84ef63
fix: [SOPHONSILK-576] wrong param to mix-precision
WhoIsYu Dec 30, 2025
427dcca
fix: global const binary op slice bug
Dec 31, 2025
86ed607
feat: mixing group size for bm1684x dynamic quant
wwwwwu64 Dec 25, 2025
72ba92f
feat: add topo-sort pass before layer group
Jan 5, 2026
8241472
feat: cuda inference
WhoIsYu Dec 23, 2025
942467b
feat: add Int lowering
Dec 30, 2025
8275281
fix: Layergroup multi-branch bug
Jan 7, 2026
d93a820
feat: cuda inference
WhoIsYu Jan 1, 2026
2f599c7
fix: [MLIR-643]
Dec 5, 2025
48be4bc
fix: [MLIR-715]
Dec 5, 2025
7c350a9
feat: mixing per token/channel dynamic quantization
wwwwwu64 Jan 7, 2026
5d52b38
feat: dynamic support multi core
HarmonyHu Nov 18, 2025
c848c50
fix: update backend
HarmonyHu Jan 10, 2026
9d2777e
fix: time_fixed_subnet for cv184x
Jan 12, 2026
90d9b83
chore: adjust code to make it clearly
HarmonyHu Jan 12, 2026
75a1f1a
refactor: Optimize ppl code writing
dgyx Jan 13, 2026
6ab33bc
feat: dump and load modules hash
Heng2024 Oct 24, 2025
1187547
fix: qwen3vl vit dynamic use multi core
HarmonyHu Jan 12, 2026
871c727
feat: lora support multicore dynamic
HarmonyHu Jan 17, 2026
e25e46b
fix: DeconvOp dynparseParam bug
Jan 8, 2026
36c44e7
fix: walkaround layergroup error in llm
HarmonyHu Jan 19, 2026
3c3dc25
feat: add cumsum op interface for tpulang
dongmingyi Jan 20, 2026
b8a3977
fix: make resnet f8 compile pass
WhoIsYu Jan 20, 2026
acf8835
fix: bmodel_checker cmd_type comp prob
charlesxzb Jan 21, 2026
9422efc
feat: tpulang interface of RotPosEmb
Jan 13, 2026
173b370
feat: fp8 cuda inference
WhoIsYu Jan 13, 2026
ed2f520
fix: ddr interleave profile error
Jan 22, 2026
5f53b49
fix: tpu_profile parser error in 1684x
HarmonyHu Jan 23, 2026
8304174
chore: model_deploy adds the correctness argument
charlesxzb Jan 23, 2026
d5e23df
fix: Rope op
Jan 23, 2026
9c79fb4
test: add test_mlir.py
dongmingyi Jan 23, 2026
80ade17
feat: support auto detect the quantization of llm
HarmonyHu Jan 26, 2026
9350379
feat: LlmConverter support mlp for bm1690
Dec 25, 2025
59cd28f
fix: gather index mapping need check
HarmonyHu Jan 27, 2026
4159497
fix: onnx optimize CastOp eliminate bug
Jan 28, 2026
a80bd97
chore: update backend libs:
Korbin-chen Jan 6, 2026
922d66d
fix: clip tpu inference when F16/BF16
Heng2024 Jan 20, 2026
3cc95cd
fix: gridsample pattern
Heng2024 Jan 12, 2026
58b00d0
chore: add lora info for block kv
HarmonyHu Jan 29, 2026
5d303bc
feat: mix infer on cuda and cpu
WhoIsYu Jan 23, 2026
d824b92
fix: MLIR-788 bug fix:
Jan 26, 2026
f2f0240
fix: MLIR-787 bug fix
Jan 26, 2026
bae1bdf
style: MLIR-792 log optimize
Jan 28, 2026
d20696b
feat: MLIR-714
Jan 28, 2026
1159435
fix: [MLIR-793]
Jan 29, 2026
1482b8b
fix: erase deleted op in pass
WhoIsYu Jan 23, 2026
42256ff
feat: [MLIR-702] tpulang dump
Nov 19, 2025
d818487
fix: remove tpulang dump test
Feb 2, 2026
7aeb307
fix: no_save mode need lghash function
Feb 2, 2026
f01e5f6
fix: fix gpu and cpu inference difference
wwwwwu64 Jan 26, 2026
ced979f
fix: onnxopt cast bug
Jan 30, 2026
e387ba1
feat: add entry of yolov26 postprocess
Feb 3, 2026
45a986b
feat: Support batch_size for LLM
24octopus Jan 21, 2026
17143ed
fix: tpulang rope
Feb 3, 2026
2e8b7bf
fix: 2D RMSNorm local nodechip bug
Jan 28, 2026
2b03bf9
fix: simplify qtable name
WhoIsYu Jan 30, 2026
be13463
fix: remove_cast bug
Feb 4, 2026
59b0662
fix: rope pattern for JIRA MLIR798
Feb 4, 2026
a9b509f
feat: support perchannel matmul in cuda inference
wwwwwu64 Jan 29, 2026
b28742a
fix: GROUP_SMALL_C judgement bug
Feb 9, 2026
92f6cd7
feat: update ppl to newest
HarmonyHu Feb 10, 2026
8a6dc91
feat: add paddleocr-vl for llm_convert.
sophon-leevi Jan 28, 2026
364154c
feat: add yolo26 pattern to qtable
WhoIsYu Feb 6, 2026
3c489cf
fix: normalize CompareConst inversed on BM1684X
Feb 12, 2026
7475c33
feat: add tpulang quick compile interface and fix abug
Feb 11, 2026
71fb346
feat: support rvti+pio build
HarmonyHu Feb 10, 2026
3d62d36
fix: wrong return value if pattern not match
WhoIsYu Feb 12, 2026
6307471
feat: add floor active
WhoIsYu Feb 12, 2026
4038496
fix: modify PaddleOCR-VL's vit quantization to f16.
sophon-leevi Feb 21, 2026
13559b7
feat: crate cuda docker from dockerfile
WhoIsYu Feb 25, 2026
e107ece
feat: llm convert prompt support dynamic
HarmonyHu Feb 27, 2026
e4c3a87
feat: Add the logic of forcing to use the global Op in the 'model_dep…
Feb 26, 2026
5313be9
feat: add ConcatVolume op for stereo matching cost volume construction
Feb 13, 2026
c97f957
feat: add core_num and dynamic tpulang mlir compile python shell
Mar 3, 2026
58a6f84
feat: arch supporting mem tag will use io_tag
tpu-mlir-vis-tools Feb 24, 2026
4c09e39
feat: more description on multi-input caliset
WhoIsYu Feb 27, 2026
e3d9e6c
fix: openclip & detr failure in model zoo regression
wwwwwu64 Mar 3, 2026
831fd6c
fix: revert automatically switch to io_tag addr_mode
charlesxzb Mar 6, 2026
a4167b9
feat: arch supporting mem tag will use io_tag
tpu-mlir-vis-tools Feb 24, 2026
0966c9a
fix: fix difference between cpu and cuda
wwwwwu64 Feb 9, 2026
66dcc0e
feat: add WeightDeduplicate pass, Merge identical weights
Mar 6, 2026
7c74e81
fix: fix the logical conflicts between PermuteBeforeGridSampler and P…
Mar 3, 2026
125d4a3
fix: add more shape ops judge and keep addconst sign pass
WhoIsYu Mar 4, 2026
b345392
fix: fix end error in MergeSlicePattern
wwwwwu64 Mar 12, 2026
499cc7a
feat: support more dimension on cuda ops
WhoIsYu Feb 28, 2026
6a7f147
fix: [MLIR-823] cast of topk output may be not in order
WhoIsYu Mar 9, 2026
d5f00f0
fix: add INT16 input type in onnx_inference.
miracle-sophgo Mar 19, 2026
51c6e74
feat: support Qwen3.5 (step 0)
HarmonyHu Mar 1, 2026
565499b
chore: format td file
HarmonyHu Mar 24, 2026
1d07289
fix: [MLIR-835]
Mar 18, 2026
38ae536
fix: update backend
dongmingyi Mar 25, 2026
b560a99
fix: fix mode error with cv181x search qtable
wwwwwu64 Mar 25, 2026
345c0e3
fix: sort, reduce error
Heng2024 Mar 18, 2026
586f14e
feat: add conv-reshape-3xslice to 3xconv-reshape pattern
WhoIsYu Mar 25, 2026
12bb7de
fix: fix get next op fail if next op has multiple outputs
WhoIsYu Mar 25, 2026
855948c
feat: tpulang support CastOp from float to int
Mar 24, 2026
a274127
feat: support bm1684x2
PostMalone1998 Aug 20, 2025
588f60d
feat: support analyse mlir
HarmonyHu Mar 24, 2026
17c6c76
feat: llm_model to analyse memory use
HarmonyHu Mar 30, 2026
bded3c6
fix: llm addr mode should be basic as default
HarmonyHu Mar 30, 2026
25b09a6
Merge branch 'master' into future/extract_op
Zane-Jiang Mar 31, 2026
3697771
fix: add IO_ALONE tag for 1684x2
HarmonyHu Apr 1, 2026
143d7f5
fix: bugfix for MLIR-865
Apr 1, 2026
e3171f0
fix: bugfix for MLIR-858
Apr 1, 2026
227223a
feat: support LLM multi device pipeline
HarmonyHu Apr 1, 2026
61b0604
fix: [MLIR-819]
Apr 1, 2026
c848335
fix: [MLIR-859] restore the affected search_threshold function
WhoIsYu Apr 2, 2026
557cad8
feat: add affine optimize for load and store
Heng2024 Jan 20, 2026
8bd0e0c
feat: Support Qwen3-ASR for llm_convert
24octopus Mar 19, 2026
3a8253a
Merge branch 'master' into future/extract_op
Zane-Jiang Apr 14, 2026
af20464
feat: bm1684x2 support some features
romain-cpu Jan 22, 2026
d26d5dc
fix: CastOp tpu inference bugs
Apr 14, 2026
19d8f9d
fix: ScatterND lower int8 indices type error
wwwwwu64 Apr 2, 2026
a184964
feat: support cuda op in roma
wwwwwu64 Mar 18, 2026
e9bab0c
fix: infer conv kernel size from weight when miss
wwwwwu64 Apr 13, 2026
b37530a
fix: fix bug for JIRA MLIR-864
Apr 14, 2026
3ac8128
feat: support moe
Apr 8, 2026
53e2aa4
fix: layer-group relax H/W backward slice propagation
Apr 10, 2026
c3a57a2
feat: support Qwen3.5 (step 1)
HarmonyHu Apr 2, 2026
987a62c
feat: add lfm2-vl for llm_convert.
sophon-leevi Mar 14, 2026
100be59
chore: refine llm_analyse
HarmonyHu Apr 22, 2026
3b199d6
fix: address waste for io-alone
HarmonyHu Apr 23, 2026
cf30dbb
chore: refine llm code
HarmonyHu Apr 24, 2026
a542644
fix: 2D RMSNorm weight eu_align bug
Apr 25, 2026
46a1d19
docs: update docs to newest
HarmonyHu Apr 27, 2026
572c8e6
chore: refine README.md and config files
HarmonyHu Apr 28, 2026
65c5a67
docs: fix docker name prob
charlesxzb Apr 27, 2026
9a411e0
fix: affine bug
Heng2024 Apr 21, 2026
403630b
chore: rename llm pp bmodels
HarmonyHu Apr 29, 2026
aa43bdf
Merge branch 'master' into future/extract_op
Zane-Jiang Apr 29, 2026
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30 changes: 30 additions & 0 deletions .editorconfig
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
# EditorConfig — https://editorconfig.org
# Aligned with .clang-format (LLVM, 2-space) and .style.yapf (PEP8, 4-space, 100 cols).

root = true

[*]
charset = utf-8
end_of_line = lf
insert_final_newline = true
trim_trailing_whitespace = true
indent_style = space

[*.{c,cc,cpp,h,hpp,inc,td}]
indent_size = 2

[*.py]
indent_size = 4
max_line_length = 100

[*.{yml,yaml,json,toml}]
indent_size = 2

[*.{sh,bash}]
indent_size = 2

[Makefile]
indent_style = tab

[*.md]
trim_trailing_whitespace = false
84 changes: 84 additions & 0 deletions .github/ISSUE_TEMPLATE/bug_report.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,84 @@
name: 🐞 Bug report
description: Report a problem with TPU-MLIR
labels: ["bug"]
body:
- type: markdown
attributes:
value: |
Thanks for taking the time to file a bug report!
Please search [existing issues](https://github.com/sophgo/tpu-mlir/issues) first to avoid duplicates.

- type: textarea
id: description
attributes:
label: Describe the bug
description: A clear and concise description of what the bug is.
validations:
required: true

- type: textarea
id: reproduce
attributes:
label: Steps to reproduce
description: Provide the exact commands you ran. A minimal model that reproduces the issue is hugely helpful.
placeholder: |
1. `model_transform.py ...`
2. `model_deploy.py ...`
3. See error: ...
render: shell
validations:
required: true

- type: textarea
id: expected
attributes:
label: Expected behavior
validations:
required: false

- type: textarea
id: logs
attributes:
label: Error logs / stack trace
render: shell
validations:
required: false

- type: input
id: version
attributes:
label: TPU-MLIR version
description: Output of `pip show tpu_mlir`, or the commit SHA if you built from source.
placeholder: e.g. tpu_mlir 1.x.y, or commit abc1234
validations:
required: true

- type: dropdown
id: chip
attributes:
label: Target chip
options:
- bm1684x
- bm1688
- bm1684
- cv186ah
- cv18xx
- other / N/A
validations:
required: true

- type: input
id: framework
attributes:
label: Source framework / model
placeholder: e.g. ONNX yolov5s, PyTorch resnet18, HuggingFace Qwen3.5
validations:
required: false

- type: input
id: env
attributes:
label: OS / Docker image
placeholder: e.g. sophgo/tpuc_dev:latest, Ubuntu 22.04
validations:
required: false
8 changes: 8 additions & 0 deletions .github/ISSUE_TEMPLATE/config.yml
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@@ -0,0 +1,8 @@
blank_issues_enabled: false
contact_links:
- name: 📚 Documentation
url: https://tpumlir.org/
about: Quick Start, Technical Reference Manual and tutorials.
- name: 💬 Q&A / Discussion
url: https://github.com/sophgo/tpu-mlir/discussions
about: Ask usage questions or share ideas with the community.
34 changes: 34 additions & 0 deletions .github/ISSUE_TEMPLATE/feature_request.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,34 @@
name: 🚀 Feature request
description: Suggest an enhancement or new capability
labels: ["enhancement"]
body:
- type: textarea
id: problem
attributes:
label: What problem are you trying to solve?
description: A clear description of the use case or pain point.
validations:
required: true

- type: textarea
id: proposal
attributes:
label: Proposed solution
description: What would you like to see? Operators, options, tools, docs, etc.
validations:
required: true

- type: textarea
id: alternatives
attributes:
label: Alternatives considered
validations:
required: false

- type: textarea
id: context
attributes:
label: Additional context
description: Links, references, related issues, sample models, etc.
validations:
required: false
33 changes: 33 additions & 0 deletions .github/PULL_REQUEST_TEMPLATE.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
<!-- Thanks for your contribution! Please fill in the sections below. -->

## Summary

<!-- One or two sentences describing what this PR does and why. -->

## Type of change

- [ ] Bug fix (non-breaking change which fixes an issue)
- [ ] New feature (non-breaking change which adds functionality)
- [ ] Breaking change (fix or feature that would change existing behavior)
- [ ] Documentation only
- [ ] Refactor / chore (no functional change)

## Related issues

<!-- e.g. "Fixes #123" or "Refs #456". Leave blank if not applicable. -->

## How has this been tested?

<!--
Describe the tests you ran. Please at least mention:
- which regression suite(s) under regression/ you executed
- target chip(s) you validated against
- any models / inputs used
-->

## Checklist

- [ ] Code is formatted (`clang-format` for C/C++, `yapf` for Python).
- [ ] Relevant regression tests pass locally.
- [ ] Documentation has been updated where necessary.
- [ ] My commits are signed with an email registered on my GitHub account.
10 changes: 5 additions & 5 deletions .github/workflows/pypi_release.yml
Original file line number Diff line number Diff line change
Expand Up @@ -19,18 +19,18 @@ jobs:

steps:
- name: Checkout repository
uses: actions/checkout@v2
uses: actions/checkout@v4

- name: Build package
run: |
. release_pip.sh
tar -czvf tpu-mlir-resource.tar regression/
tar -czvf tpu-mlir-resource.tar regression/{model,cali_tables,config,dataset,image,npz_input}
cp -rf install/docs/TPU-MLIR_* ./
cp install/docs/TPU-MLIR快速入门指南.pdf ./TPU-MLIR_Quick_Start_ZH.pdf
cp install/docs/TPU-MLIR开发参考手册.pdf ./TPU-MLIR_Technical_Reference_Manual_ZH.pdf

- name: Upload to Artifacts
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v4
with:
name: my-artifact
path: ./dist/
Expand Down Expand Up @@ -59,7 +59,7 @@ jobs:
contents: write
id-token: write # IMPORTANT: this permission is mandatory for trusted publishing
steps:
- uses: actions/download-artifact@v3
- uses: actions/download-artifact@v4
with:
name: my-artifact
path: ./dist/
Expand All @@ -68,4 +68,4 @@ jobs:
run: rm ./dist/*.tar.gz

- name: Publish package distributions to PyPI
uses: pypa/gh-action-pypi-publish@release/v1
uses: pypa/gh-action-pypi-publish@release/v1
21 changes: 20 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -2,13 +2,17 @@ build/
build_ap/
build_en/
build_zh/
build_bm*/
build_sg*/
install/
tmp/
work_dir/
._*
.DS_Store
__pycache__
python/transform/tflite
python/debugger/soc_tools/tmp_cache
regression_op_log/
regression_out/
tags
.vscode/
Expand All @@ -22,4 +26,19 @@ bmodel_fbs.py
.ipynb_checkpoints/
cross_toolchains/
dist/
!/python/tools/soc_infer/debugger/bmodel_fbs.py
!/python/tools/soc_infer/debugger/bmodel_fbs.py

# Python
*.egg-info/
*.pyc
.pytest_cache/
.mypy_cache/
.coverage
coverage.xml
htmlcov/

# Editors / IDEs
.idea/
*.swp
*.swo
*~
4 changes: 4 additions & 0 deletions .style.yapf
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@@ -0,0 +1,4 @@
[style]
based_on_style = pep8
column_limit = 100
indent_width = 4
28 changes: 27 additions & 1 deletion .vscode/settings.json
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
"*.txt": "makefile",
"*.go": "go",
"*.def": "cpp",
"*.pl": "cpp",
"functional": "cpp",
"memory": "cpp",
"optional": "cpp",
Expand Down Expand Up @@ -95,7 +96,32 @@
"__functional_base": "cpp",
"__functional_base_03": "cpp",
"__tuple": "cpp",
"__target_macros": "cpp"
"__target_macros": "cpp",
"any": "cpp",
"barrier": "cpp",
"charconv": "cpp",
"coroutine": "cpp",
"csetjmp": "cpp",
"csignal": "cpp",
"cuchar": "cpp",
"netfwd": "cpp",
"source_location": "cpp",
"rope": "cpp",
"slist": "cpp",
"latch": "cpp",
"scoped_allocator": "cpp",
"syncstream": "cpp",
"*.ipp": "cpp",
"__node_handle": "cpp",
"hash_map": "cpp",
"hash_set": "cpp",
"stacktrace": "cpp",
"expected": "cpp",
"*.bak": "cpp",
"tpu_impl_custom_ops.h": "c",
"tpu_utils.h": "c",
"param_parser.h": "c",
"assert.h": "c"
},
"files.autoSave": "afterDelay",
"files.trimTrailingWhitespace": true,
Expand Down
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