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lib: tenstorrent: bh_arc: dw_apb_i2c.c: use i2c pin control driver #868

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lib: tenstorrent: bh_arc: dw_apb_i2c.c: use i2c pin control driver #868

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ef56f38
drivers: pinctrl: pinctrl_tt_bh.c: add i2c1 pin control
alexapostolu Jan 12, 2026
19b16f7
lib: tenstorrent: bh_arc: dw_apb_i2c.c: use i2c pin control driver
alexapostolu Jan 12, 2026
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4 changes: 2 additions & 2 deletions app/smc/boards/tt_blackhole_tt_blackhole_smc.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,11 @@
#include "tt_blackhole_smc_partitions.dtsi"

&i2c1 {
status = "disabled";
status = "okay";
};

&i2c2 {
status = "disabled";
status = "okay";
};

/*
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20 changes: 10 additions & 10 deletions boards/tenstorrent/tt_blackhole/tt_blackhole_tt_blackhole_smc.dts
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Expand Up @@ -89,48 +89,48 @@
};

&i2c1 {
status = "disabled";
status = "okay";

regulator0: max20816@64 {
compatible = "maxim,max20816";
reg = <0x64>;
status = "disabled";
status = "okay";
};

regulator1: max20816@65 {
compatible = "maxim,max20816";
reg = <0x65>;
status = "disabled";
status = "okay";
};

regulator2: mpm3695@33 {
compatible = "mps,mpm3695";
reg = <0x33>;
status = "disabled";
status = "okay";
};

regulator3: max20730@54 {
compatible = "maxim,max20730";
reg = <0x54>;
status = "disabled";
status = "okay";
};

regulator4: max20730@55 {
compatible = "maxim,max20730";
reg = <0x55>;
status = "disabled";
status = "okay";
};

regulator5: max20730@56 {
compatible = "maxim,max20730";
reg = <0x56>;
status = "disabled";
status = "okay";
};

regulator6: max20730@57 {
compatible = "maxim,max20730";
reg = <0x57>;
status = "disabled";
status = "okay";
};
};

Expand All @@ -140,13 +140,13 @@
sw0: switch@72 {
compatible = "ti,tps22993";
reg = <0x72>;
status = "disabled";
status = "okay";
};

sw1: switch@73 {
compatible = "ti,tps22993";
reg = <0x73>;
status = "disabled";
status = "okay";
};
};

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60 changes: 60 additions & 0 deletions drivers/pinctrl/pinctrl_tt_bh.c
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Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,17 @@
#define PINCTRL_TT_BH_GPIO3_PAD_STEN_CNTL_REG_OFFSET 0x000005F8
#define PINCTRL_TT_BH_GPIO4_PAD_STEN_CNTL_REG_OFFSET 0x000005FC

#define RESET_UNIT_I2C_PAD_CNTL_REG_ADDR 0x800301C0
#define RESET_UNIT_I2C1_PAD_CNTL_REG_ADDR 0x800305CC
#define RESET_UNIT_I2C2_PAD_CNTL_REG_ADDR 0x800305D8
#define RESET_UNIT_I2C_PAD_DATA_REG_ADDR 0x800301C4
#define RESET_UNIT_I2C1_PAD_DATA_REG_ADDR 0x800305D0
#define RESET_UNIT_I2C2_PAD_DATA_REG_ADDR 0x800305DC
#define RESET_UNIT_I2C_CNTL_REG_ADDR 0x800300F0
#define RESET_UNIT_I2C_PAD_CNTL_RXEN_MASK 0xC0
#define RESET_UNIT_I2C_PAD_CNTL_TRIEN_MASK 0x3
#define RESET_UNIT_I2C_PAD_CNTL_DRV_SHIFT 10

#define PINCTRL_TT_BH_UART_CNTL_REG_OFFSET 0x00000608

LOG_MODULE_REGISTER(bh_arc_pinctrl, CONFIG_PINCTRL_LOG_LEVEL);
Expand All @@ -61,6 +72,49 @@
static inline uintptr_t pinctrl_tt_bh_drvs_reg(uint32_t pin);
static inline uint32_t pinctrl_tt_bh_drvs_shift(uint32_t pin);

static inline uint32_t pinctrl_tt_bh_get_i2c_pad_cntl_addr(uint32_t id)
{
switch (id) {
case 0:
return RESET_UNIT_I2C_PAD_CNTL_REG_ADDR;
case 1:
return RESET_UNIT_I2C1_PAD_CNTL_REG_ADDR;
case 2:
return RESET_UNIT_I2C2_PAD_CNTL_REG_ADDR;
default:
return 0;
}
}

static inline uint32_t pinctrl_tt_bh_get_i2c_pad_data_addr(uint32_t id)
{
switch (id) {
case 0:
return RESET_UNIT_I2C_PAD_DATA_REG_ADDR;
case 1:
return RESET_UNIT_I2C1_PAD_DATA_REG_ADDR;
case 2:
return RESET_UNIT_I2C2_PAD_DATA_REG_ADDR;
default:
return 0;
}
}

static void pinctrl_tt_bh_init_i2c(uint32_t id)
{
/* initialize I2C pads for i2c controller */
uint32_t drive_strength = 0x7F; /* 50% of max 0xFF */

sys_write32((drive_strength << RESET_UNIT_I2C_PAD_CNTL_DRV_SHIFT) |
RESET_UNIT_I2C_PAD_CNTL_RXEN_MASK | RESET_UNIT_I2C_PAD_CNTL_TRIEN_MASK,
pinctrl_tt_bh_get_i2c_pad_cntl_addr(id));
sys_write32(0, pinctrl_tt_bh_get_i2c_pad_data_addr(id));

uint32_t i2c_cntl = sys_read32(RESET_UNIT_I2C_CNTL_REG_ADDR);

sys_write32(i2c_cntl | 1 << id, RESET_UNIT_I2C_CNTL_REG_ADDR);
}

static int pinctrl_tt_bh_set(uint32_t pin, uint32_t func, uint32_t mode)
{
uint32_t idx;
Expand All @@ -83,6 +137,12 @@
case 48: /* uart0_tx_default */
case 49: /* uart0_rx_default */
break;
case 15: /* i2c1_sda_default */
case 16: /* i2c1_scl_default */
pinctrl_tt_bh_init_i2c(0); /* I2CMst */

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drivers/pinctrl/pinctrl_tt_bh.c:142 
-	case 15: /* i2c1_sda_default */
-	case 16: /* i2c1_scl_default */
+	case 15:                           /* i2c1_sda_default */
+	case 16:                           /* i2c1_scl_default */
return 0;
case 0: /* default (empty) pin control, nothing for now */
return 0;
default:
LOG_DBG("No alternate function for pin %u", pin);
return -EIO;
Expand Down
24 changes: 23 additions & 1 deletion dts/vendor/tenstorrent/tt_blackhole_smc.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#include "skeleton.dtsi"

#include <zephyr/dt-bindings/i2c/i2c.h>
#include <zephyr/dt-bindings/pinctrl/tt_blackhole_smc-pinctrl.h>

/ {
aliases {
Expand Down Expand Up @@ -388,7 +389,20 @@

pinctrl: pinctrl {
compatible = "tenstorrent,bh-pinctrl";
status = "disabled";
i2c0_default: i2c0_default {
pinmux = <TT_BH_PINMUX_DEFAULT>;
};
i2c1_default: i2c1_default {
pinmux = <TT_BH_PINMUX(A, 15, I2C1_SDA)>,
<TT_BH_PINMUX(A, 16, I2C1_SCL)>;
};
i2c3_default: i2c3_default {
pinmux = <TT_BH_PINMUX_DEFAULT>;
};
spi_default: spi_default {
pinmux = <TT_BH_PINMUX_DEFAULT>;
};
status = "okay";
};

timer0: timer0 {
Expand Down Expand Up @@ -694,6 +708,8 @@
<12 1 0>, <13 1 0>, <14 1 0>, <15 1 0>, <16 1 0>, <17 1 0>,
<18 1 0>, <19 1 0>, <20 1 0>, <21 1 0>, <22 1 0>, <23 1 0>;
interrupt-parent = <&ictl2>;
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
status = "okay";
};

Expand All @@ -708,6 +724,8 @@
<36 1 0>, <37 1 0>, <38 1 0>, <39 1 0>, <40 1 0>, <41 1 0>,
<42 1 0>, <43 1 0>, <44 1 0>, <45 1 0>, <46 1 0>, <47 1 0>;
interrupt-parent = <&ictl2>;
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
status = "okay";
};

Expand All @@ -722,6 +740,8 @@
<12 1 0>, <13 1 0>, <14 1 0>, <15 1 0>, <16 1 0>, <17 1 0>,
<18 1 0>, <19 1 0>, <20 1 0>, <21 1 0>, <22 1 0>, <23 1 0>;
interrupt-parent = <&ictl3>;
pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default";
status = "disabled";
};

Expand All @@ -739,6 +759,8 @@
clocks = <&sysclk>;
packet-data-limit = <65536>;
op-mode = "MSPI_OP_MODE_CONTROLLER";
pinctrl-0 = <&spi_default>;
pinctrl-names = "default";
};

cdt0: cdt@80300000 {
Expand Down
5 changes: 5 additions & 0 deletions include/zephyr/dt-bindings/pinctrl/tt_blackhole_smc-pinctrl.h
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Expand Up @@ -26,6 +26,9 @@
#define TT_BH_PINMUX_A51_UART0_TX 48 PINCTRL_TT_BH_AF1(0)
#define TT_BH_PINMUX_B15_UART0_RX 49 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_RXEN)

#define TT_BH_PINMUX_A15_I2C1_SDA 15 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_PUEN | PINCTRL_TT_BH_RXEN | PINCTRL_TT_BH_DRVS(8))

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include/zephyr/dt-bindings/pinctrl/tt_blackhole_smc-pinctrl.h:29  line length of 141 exceeds 100 columns
#define TT_BH_PINMUX_A16_I2C1_SCL 16 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_PUEN | PINCTRL_TT_BH_RXEN | PINCTRL_TT_BH_DRVS(8))

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include/zephyr/dt-bindings/pinctrl/tt_blackhole_smc-pinctrl.h:30  line length of 141 exceeds 100 columns

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include/zephyr/dt-bindings/pinctrl/tt_blackhole_smc-pinctrl.h:31 
-#define TT_BH_PINMUX_A15_I2C1_SDA 15 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_PUEN | PINCTRL_TT_BH_RXEN | PINCTRL_TT_BH_DRVS(8))
-#define TT_BH_PINMUX_A16_I2C1_SCL 16 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_PUEN | PINCTRL_TT_BH_RXEN | PINCTRL_TT_BH_DRVS(8))
+#define TT_BH_PINMUX_A15_I2C1_SDA                                                                  \
+	15 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_PUEN | PINCTRL_TT_BH_RXEN |       \
+			     PINCTRL_TT_BH_DRVS(8))
+#define TT_BH_PINMUX_A16_I2C1_SCL                                                                  \
+	16 PINCTRL_TT_BH_AF1(PINCTRL_TT_BH_TRIEN | PINCTRL_TT_BH_PUEN | PINCTRL_TT_BH_RXEN |       \
+			     PINCTRL_TT_BH_DRVS(8))
/**
* @brief Configure a Blackhole pin for a non-gpio purpose
*
Expand All @@ -39,6 +42,8 @@
*/
#define TT_BH_PINMUX(col, row, func) TT_BH_PINMUX_##col##row##_##func

#define TT_BH_PINMUX_DEFAULT 0 PINCTRL_TT_BH_AF1(0)

/**
* @brief Configure a Blackhole pin as a GPIO
*
Expand Down
17 changes: 0 additions & 17 deletions lib/tenstorrent/bh_arc/dw_apb_i2c.c
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Expand Up @@ -395,21 +395,6 @@ uint32_t I2CReadRxFifo(uint32_t id, uint8_t *p_read_buf)
return 0;
}

void I2CInitGPIO(uint32_t id)
{
/* initialize I2C pads for i2c controller */
uint32_t drive_strength = 0x7F; /* 50% of max 0xFF */

WriteReg(GetI2CPadCntlAddr(id), (drive_strength << RESET_UNIT_I2C_PAD_CNTL_DRV_SHIFT) |
RESET_UNIT_I2C_PAD_CNTL_RXEN_MASK |
RESET_UNIT_I2C_PAD_CNTL_TRIEN_MASK);
WriteReg(GetI2CPadDataAddr(id), 0);

uint32_t i2c_cntl = ReadReg(RESET_UNIT_I2C_CNTL_REG_ADDR);

WriteReg(RESET_UNIT_I2C_CNTL_REG_ADDR, i2c_cntl | 1 << id);
}

/* Initialize I2C controller by setting up I2C pads and configuration settings. */
void I2CInit(I2CMode mode, uint32_t slave_addr, I2CSpeedMode speed, uint32_t id)
{
Expand All @@ -420,8 +405,6 @@ void I2CInit(I2CMode mode, uint32_t slave_addr, I2CSpeedMode speed, uint32_t id)
WaitTxFifoEmpty(id);
WaitMasterIdle(id);

I2CInitGPIO(id);

/* configure dw_apb_i2c controller */
WriteReg(GetI2CRegAddr(id, GET_I2C_OFFSET(IC_ENABLE)), 0);
Wait(10 * WAIT_1US);
Expand Down
1 change: 0 additions & 1 deletion lib/tenstorrent/bh_arc/dw_apb_i2c.h
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Expand Up @@ -23,7 +23,6 @@ typedef enum {
} I2CSpeedMode;

bool IsValidI2CMasterId(uint32_t id);
void I2CInitGPIO(uint32_t id);
void I2CInit(I2CMode mode, uint32_t slave_addr, I2CSpeedMode speed, uint32_t id);
void I2CReset(void);
uint32_t I2CReadRxFifo(uint32_t id, uint8_t *p_read_buf);
Expand Down
4 changes: 0 additions & 4 deletions lib/tenstorrent/bh_arc/smbus_target.c
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Expand Up @@ -206,10 +206,6 @@ static int InitSmbusTarget(void)
{
SetPostCode(POST_CODE_SRC_CMFW, POST_CODE_ARC_INIT_STEPB);

if (IS_ENABLED(CONFIG_ARC)) {
I2CInitGPIO(CM_I2C_DM_TARGET_INST);
}

if (!device_is_ready(smbus_target)) {
printk("SMBUS target device not ready\n");
return 0;
Expand Down
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