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timboettiger
openfpga-SNES-pro-action-replay-mk3
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savestate incr.5: PPU registers
Spike Fit Report
#11:
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803ead1
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16m 16s
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16m 16s
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docs: precise PPU + DSP savestate implementation spec (next steps)
Spike Fit Report
#10:
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670cc5c
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14m 35s
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savestate incr.4: SMP/SPC700 registers + multi-chip aggregation
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#9:
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a0efc76
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14m 58s
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savestate incr.3b: complete the 65C816 state (PC/IR/STATE/interrupt)
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#8:
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f6ac372
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savestate incr.3a: default the new P65C816 ss ports (fixes SA-1 build)
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#7:
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15m 31s
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savestate incr.3a: SaveStateBus + 65C816 architectural registers
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#6:
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savestate incr.2: fix memory-path timing (SDC multicycle)
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#5:
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f22c78e
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13m 43s
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savestate incr.2: serialize WRAM + ARAM (PSRAM) via clk_mem DMA
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#4:
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8269c9f
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savestate incr.1: core-pause gate (ss_busy freezes the whole SNES)
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#3:
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docs: record measured spike fit results (fits; timing failure pre-exi…
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spike: savestate/sleep feasibility (VRAM-only) + CI fit report
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#1:
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78e0a38
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15m 1s
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15m 1s
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