This repo implements the full workflow described in proposal_rq2.tex:
- CUDA benchmarks (GEMM / stencil / pointer-chasing)
- Microbenchmark-based architecture constants
- Parameter-free prediction model
- Validation (MAPE, leave-one-out, nominal vs effective L2)
- Visualization and anomaly analysis
- Triton pre-filter integration scaffold
cuda/src/benchmark_gemm.cuV0naive GEMMV1shared-memory tiled GEMMV3cp.async pipelined GEMM (num_stages2/3/4)RefcuBLAS SGEMM baseline- Tile-size sweep support:
--tile-sizes 16,32,64,128
cuda/src/benchmark_stencil.cuV1/V31D stencil with halo,num_stages2/3/4
cuda/src/microbench_pointer_chase.cu- Pointer-chasing latency sweep (
cycles/load,ns/load) - Streaming bandwidth curve (
stream_bandwidth_gbps)
- Pointer-chasing latency sweep (
src/predictor.py- overlap + occupancy model
l2_modesupport:effectivevsnominal
scripts/evaluate_mape.py- per-GPU / per-workload MAPE
- leave-one-out report
- nominal-vs-effective L2 comparison
scripts/plot_results.py- Speedup vs size
- Speedup vs
W_conc/C_L2 S*(N)- Speedup-rank vs ridge-rank
- Predicted-vs-measured scatter
- Pipeline benefit heatmap
scripts/anomaly_analysis.pydelta = predicted - measured, top-k by|delta|
scripts/run_nsight_profiling.py- Nsight Compute CLI collection for selected
(size, stage, tile)points
- Nsight Compute CLI collection for selected
src/triton_prefilter.py- stage pruning logic
- Triton decorator integration via
autotune_with_cp_async_prefilter(...)
triton/gemm_kernel.py- minimal demo kernel scaffold using the pre-filter decorator
slurm/run_v100.sbatchslurm/run_a40.sbatchslurm/run_a100_mig.sbatchslurm/run_h100.sbatchslurm/run_ncu.sbatchslurm/run_full_pipeline.sbatch
Per-GPU scripts write GPU-specific output filenames (for example outputs/gemm_raw_a40.csv) to avoid overwrite when collecting data across multiple machines.
cmake -S . -B build
cmake --build build -jpython3 scripts/run_cuda_benchmarks.py --run-gemm --run-stencil --run-pointer --run-v0Key options:
--gemm-tile-sizes 16,32,64,128--gemm-stages 2,3,4--gemm-n-values 1024,2048,...--stencil-lengths 65536,262144,...--gpu-name A40(or custom label)
python3 scripts/extract_l2_params.py \
--input outputs/pointer_chase_raw.csv \
--output-json outputs/l2_params.jsonUse the suggested values to update src/gpu_specs.py:
l2_eff_mbl2_latency_cyclesdram_latency_cycles
python3 scripts/build_measured_speedup_csv.py \
--raw outputs/gemm_raw.csv,outputs/stencil_raw.csv \
--output outputs/measured_speedup.csvpython3 scripts/run_model_validation.py --compare-l2-modes --leave-one-outEquivalent direct command:
python3 scripts/evaluate_mape.py \
--measured outputs/measured_speedup.csv \
--compare-l2-modes \
--leave-one-outpython3 scripts/plot_results.py \
--measured outputs/measured_speedup.csv \
--output-dir outputs/figurespython3 scripts/run_nsight_profiling.py --build-dir build --output-dir outputs/nsight
python3 scripts/anomaly_analysis.py --measured outputs/measured_speedup.csv --ncu-dir outputs/nsightInstall with:
pip install -r requirements.txtrequirements.txt includes:
numpypandasmatplotlibtriton(optional, gated by Python version marker)
- cp.async kernels are only meaningful on SM80+ (Ampere/Hopper).
- V100 naturally acts as boundary case (
V3not run). - In this current coding environment,
nvccis not available, so CUDA binaries were not compiled here; Python scripts/tests were validated.