toitlang · floitsch · Oct 18, 2025 · Oct 19, 2025 · floitsch · Oct 19, 2025
diff --git a/Makefile b/Makefile
@@ -253,6 +253,10 @@ esp32c3:
 esp32c6:
 	$(MAKE) IDF_TARGET=esp32c6 ESP32_CHIP=esp32c6 esp32
 
+.PHONY: esp32p4
+esp32p4:
+	$(MAKE) IDF_TARGET=esp32p4 ESP32_CHIP=esp32p4 esp32
+
 .PHONY: esp32s2
 esp32s2:
 	$(MAKE) IDF_TARGET=esp32s2 ESP32_CHIP=esp32s2 esp32

diff --git a/lib/gpio/adc.toit b/lib/gpio/adc.toit
@@ -44,6 +44,9 @@ Pin 5 is an ADC pin of channel 2. However, the controller of ADC channel 2
 ADC1: Pins 0-6
 No ADC2.
 
+## ESP32P4
+ADC1: Pins 16-23, 49-54
+
 ## ESP32S2
 ADC1: Pins 1-10
 ADC2: Pins 11-20

diff --git a/lib/gpio/gpio.toit b/lib/gpio/gpio.toit
@@ -54,6 +54,17 @@ Pins 0-7 are RTC pins and can be used in deep-sleep.
 For chip variants without an in-package flash, GPIO14 is not led out to any
   chip pins.
 
+# ESP32P4
+The ESP32P4 has 55 physical pins (0-54). Each pin can be used as
+  a general-purpose pin, or be connected to a peripheral.
+
+Pins 34-38 are strapping pins.
+Pins 24-25 are JTAG pins, and should not be used if JTAG support is needed.
+Pins 16-23, 49-54 are ADC pins of channel 1.
+Pins 51-54 are analog comparator pins.
+Pins 0-15 are RTC pins and can be used in deep-sleep.
+Pins 2-15 can be used as touch sensor pins.
+
 # ESP32S2
 The ESP32S2 has 43 physical pins (0-21, 26-46). Each pin can be used as
   a general-purpose pin, or be connected to a peripheral.

diff --git a/lib/rmt.toit b/lib/rmt.toit
@@ -18,10 +18,10 @@ $Signals represent a collection of signals to be sent by the RMT controller.
 
 The ESP32 has 8 RMT channels, each of which can be configured for input or output.
 The ESP32C3 and ESP32C6 each have 2 TX and 2 RX channels.
-The ESP32S2 and ESP32S3 each have 4 TX and 4 RX channels.
+The ESP32P4, ESP32S2 and ESP32S3 each have 4 TX and 4 RX channels.
 
 The number of bytes per memory block is 256 on the ESP32 and ESP32S2. It is
-  192 on the ESP32C3, ESP32C6, and ESP32S3.
+  192 on the ESP32C3, ESP32C6, ESP32P4, and ESP32S3.
 
 # Examples
 
@@ -693,7 +693,7 @@ class Channel:
 The number of bytes per memory block.
 
 On the ESP32 and ESP32S2 it is 256.
-On the ESP32C3, ESP32C6, and ESP32S3 it is 192.
+On the ESP32C3, ESP32C6, ESP32P4, and ESP32S3 it is 192.
 */
 BYTES-PER-MEMORY-BLOCK/int ::= rmt-bytes-per-memory-block_
 
@@ -914,8 +914,8 @@ class Out extends Channel_:
 
   The $loop-count parameter specifies how many times the signals are repeated. If it is
     set to -1, the signals are repeated indefinitely. The ESP32 only supports -1 (infinite)
-    and 1. Other variants, like the ESP32C3, ESP32C6, ESP32S2, and ESP32S3, support other
-    positive values.
+    and 1. Other variants, like the ESP32C3, ESP32C6, ESP32P4, ESP32S2, and ESP32S3, support
+    other positive values.
 
   The $done-level parameter specifies the level of the pin when the transmission is done.
   */
@@ -989,7 +989,7 @@ class Out extends Channel_:
 Synchronizes the output of multiple $Out channels.
 
 Not all hardware supports this feature. The ESP32 does not, but the ESP32C3, ESP32C6,
-  ESP32S2, and ESP32S3 do.
+  ESP32P4, ESP32S2, and ESP32S3 do.
 */
 class SynchronizationManager:
   resource_ /ByteArray? := ?

diff --git a/lib/system/system.toit b/lib/system/system.toit
@@ -65,6 +65,9 @@ ARCHITECTURE-ESP32C3 ::= "esp32c3"
 /** Return value from $architecture. */
 ARCHITECTURE-ESP32C6 ::= "esp32c6"
 
+/** Return value from $architecture. */
+ARCHITECTURE-ESP32P4 ::= "esp32p4"
+
 /** Return value from $architecture. */
 ARCHITECTURE-ESP32S2 ::= "esp32s2"
 

diff --git a/src/os_esp32.cc b/src/os_esp32.cc
@@ -50,6 +50,8 @@
   #include <esp32c3/rtc.h>
 #elif CONFIG_IDF_TARGET_ESP32C6
   #include <esp32c6/rtc.h>
+#elif CONFIG_IDF_TARGET_ESP32P4
+  #include <esp32p4/rtc.h>
 #elif CONFIG_IDF_TARGET_ESP32S2
   #include <esp32s2/rtc.h>
 #elif CONFIG_IDF_TARGET_ESP32S3
@@ -317,6 +319,8 @@ void OS::set_up() {
   const char* chip_name = "ESP32C3";
 #elif defined(CONFIG_IDF_TARGET_ESP32C6)
   const char* chip_name = "ESP32C6";
+#elif defined(CONFIG_IDF_TARGET_ESP32P4)
+  const char* chip_name = "ESP32P4";
 #elif defined(CONFIG_IDF_TARGET_ESP32S2)
   const char* chip_name = "ESP32S2";
 #elif defined(CONFIG_IDF_TARGET_ESP32S3)
@@ -425,6 +429,9 @@ OS::HeapMemoryRange OS::get_heap_memory_range() {
 #ifdef CONFIG_IDF_TARGET_ESP32S3
   range.address = reinterpret_cast<void*>(0x3fca0000);
   range.size = 384 * KB;
+#elif CONFIG_IDF_TARGET_ESP32P4
+  range.address = reinterpret_cast<void*>(0x4ff00000);
+  range.size = 0x4ff3afc0 - 0x4ff00000;
 #else
   //                           DRAM range            IRAM range
   // Internal SRAM 2 200k 3ffa_e000 - 3ffe_0000
@@ -452,6 +459,8 @@ const char* OS::get_architecture() {
   return "esp32c3";
 #elif defined(CONFIG_IDF_TARGET_ESP32C6)
   return "esp32c6";
+#elif defined(CONFIG_IDF_TARGET_ESP32P4)
+  return "esp32p4";
 #elif defined(CONFIG_IDF_TARGET_ESP32S2)
   return "esp32s2";
 #elif defined(CONFIG_IDF_TARGET_ESP32S3)

diff --git a/src/primitive_esp32.cc b/src/primitive_esp32.cc
@@ -63,6 +63,8 @@
   #include <esp32c3/rom/rtc.h>
 #elif CONFIG_IDF_TARGET_ESP32C6
   #include <esp32c6/rom/rtc.h>
+#elif CONFIG_IDF_TARGET_ESP32P4
+  #include <esp32p4/rom/rtc.h>
 #elif CONFIG_IDF_TARGET_ESP32S2
   #include <esp32s2/rom/rtc.h>
 #elif CONFIG_IDF_TARGET_ESP32S3
@@ -363,7 +365,9 @@ PRIMITIVE(enable_external_wakeup) {
 }
 
 PRIMITIVE(enable_touchpad_wakeup) {
-#if SOC_TOUCH_SENSOR_SUPPORTED
+#ifdef CONFIG_IDF_TARGET_ESP32P4
+  FAIL(UNIMPLEMENTED);
+#elif SOC_TOUCH_SENSOR_SUPPORTED
   esp_err_t err = esp_sleep_enable_touchpad_wakeup();
   if (err != ESP_OK) {
     ESP_LOGE("Toit", "Failed: sleep_enable_touchpad_wakeup");
@@ -400,7 +404,9 @@ PRIMITIVE(ext1_wakeup_status) {
 }
 
 PRIMITIVE(touchpad_wakeup_status) {
-#if SOC_TOUCH_SENSOR_SUPPORTED
+#if defined(CONFIG_IDF_TARGET_ESP32P4)
+  FAIL(UNIMPLEMENTED);
+#elif SOC_TOUCH_SENSOR_SUPPORTED
   touch_pad_t pad = esp_sleep_get_touchpad_wakeup_status();
   return Primitive::integer(touch_pad_to_pin_num(pad), process);
 #else
@@ -634,7 +640,9 @@ PRIMITIVE(pin_hold_disable) {
 }
 
 PRIMITIVE(deep_sleep_pin_hold_enable) {
-#if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
+#if defined(CONFIG_IDF_TARGET_ESP32P4)
+  FAIL(UNIMPLEMENTED);
+#elif !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
   gpio_deep_sleep_hold_en();
   return process->null_object();
 #else
@@ -643,7 +651,9 @@ PRIMITIVE(deep_sleep_pin_hold_enable) {
 }
 
 PRIMITIVE(deep_sleep_pin_hold_disable) {
-#if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
+#if defined(CONFIG_IDF_TARGET_ESP32P4)
+  FAIL(UNIMPLEMENTED);
+#elif !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP
   gpio_deep_sleep_hold_dis();
   return process->null_object();
 #else

diff --git a/src/resources/adc_esp32.cc b/src/resources/adc_esp32.cc
@@ -106,6 +106,38 @@ static int get_adc1_channel(int pin) {
   }
 }
 
+#elif CONFIG_IDF_TARGET_ESP32P4
+
+#define ADC_CLK_SRC_DEFAULT ADC_RTC_CLK_SRC_DEFAULT
+
+static int get_adc1_channel(int pin) {
+  switch (pin) {
+    case 16: return ADC_CHANNEL_0;
+    case 17: return ADC_CHANNEL_1;
+    case 18: return ADC_CHANNEL_2;
+    case 19: return ADC_CHANNEL_3;
+    case 20: return ADC_CHANNEL_4;
+    case 21: return ADC_CHANNEL_5;
+    case 22: return ADC_CHANNEL_6;
+    case 23: return ADC_CHANNEL_7;
+    default: return -1;
+  }
+}
+
+static int get_adc2_channel(int pin) {
+  // Note that the latest version of the ESP-IDF doesn't have a second channel
+  // anymore, but merges both ADCs into one.
+  switch (pin) {
+    case 49: return ADC_CHANNEL_0;
+    case 50: return ADC_CHANNEL_1;
+    case 51: return ADC_CHANNEL_2;
+    case 52: return ADC_CHANNEL_3;
+    case 53: return ADC_CHANNEL_4;
+    case 54: return ADC_CHANNEL_5;
+    default: return -1;
+  }
+}
+
 #elif CONFIG_IDF_TARGET_ESP32S2
 
 #define ADC_CLK_SRC_DEFAULT ADC_RTC_CLK_SRC_DEFAULT

diff --git a/src/resources/dac_esp32.cc b/src/resources/dac_esp32.cc
@@ -63,6 +63,10 @@ static dac_channel_t get_dac_channel(int pin) {
 
 #error "Unexpected DAC support for the ESP32C6"
 
+#elif CONFIG_IDF_TARGET_ESP32P4
+
+#error "Unexpected DAC support for the ESP32P4"
+
 #elif CONFIG_IDF_TARGET_ESP32S2
 
 static dac_channel_t get_dac_channel(int pin) {

diff --git a/src/resources/espnow_esp32.cc b/src/resources/espnow_esp32.cc
@@ -15,7 +15,9 @@
 
 #include "../top.h"
 
-#if defined(TOIT_ESP32) && defined(CONFIG_TOIT_ENABLE_ESPNOW)
+#if defined(TOIT_ESP32) && \
+    (!defined(CONFIG_IDF_TARGET_ESP32P4)) && \
+    defined(CONFIG_TOIT_ENABLE_ESPNOW)
 
 #include <esp_wifi.h>
 #include <esp_event.h>
@@ -648,4 +650,4 @@ PRIMITIVE(remove_peer) {
 
 } // namespace toit
 
-#endif  // defined(TOIT_ESP32) && defined(CONFIG_TOIT_ENABLE_ESPNOW)
+#endif  // defined(TOIT_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32P4) && defined(CONFIG_TOIT_ENABLE_ESPNOW)
diff --git a/src/resources/gpio_esp32.cc b/src/resources/gpio_esp32.cc
@@ -44,6 +44,7 @@ GPIO summary:
 - Esp32: https://docs.espressif.com/projects/esp-idf/en/stable/esp32/api-reference/peripherals/gpio.html
 - Esp32c3: https://docs.espressif.com/projects/esp-idf/en/stable/esp32c3/api-reference/peripherals/gpio.html
 - Esp32c6: https://docs.espressif.com/projects/esp-idf/en/stable/esp32c6/api-reference/peripherals/gpio.html
+- Esp32p4: https://docs.espressif.com/projects/esp-idf/en/stable/esp32p4/api-reference/peripherals/gpio.html
 - Esp32s2: https://docs.espressif.com/projects/esp-idf/en/stable/esp32s2/api-reference/peripherals/gpio.html
 - Esp32s3: https://docs.espressif.com/projects/esp-idf/en/stable/esp32s3/api-reference/peripherals/gpio.html
 */
@@ -58,6 +59,11 @@ static ResourcePool<int, -1> gpio_pins(
     20, 21
 #elif CONFIG_IDF_TARGET_ESP32C6
     20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
+#elif CONFIG_IDF_TARGET_ESP32P4
+    20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
+    30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
+    40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
+    50, 51, 52, 53, 54
 #elif CONFIG_IDF_TARGET_ESP32S3
     20, 21, 26, 27, 28, 29,
     30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
@@ -86,6 +92,11 @@ static bool is_restricted_pin(int num) {
   // Pins 24-30 are used for flash and PSRAM.
   return 24 <= num && num <= 30;
 }
+#elif CONFIG_IDF_TARGET_ESP32P4
+static bool is_restricted_pin(int num) {
+  // TODO(floitsch): are there restricted pins on the P4?
+  return false;
+}
 #elif CONFIG_IDF_TARGET_ESP32S3
 static bool is_restricted_pin(int num) {
   // Pins 26-32 are used for flash, and pins 33-37 are used for

diff --git a/src/resources/touch_esp32.cc b/src/resources/touch_esp32.cc
@@ -80,6 +80,48 @@ int touch_pad_to_pin_num(touch_pad_t pad) {
   return -1;
 }
 
+#elif CONFIG_IDF_TARGET_ESP32P4
+
+static touch_pad_t get_touch_pad(int pin) {
+  switch (pin) {
+    case 2:  return TOUCH_PAD_NUM1;
+    case 3:  return TOUCH_PAD_NUM2;
+    case 4:  return TOUCH_PAD_NUM3;
+    case 5:  return TOUCH_PAD_NUM4;
+    case 6:  return TOUCH_PAD_NUM5;
+    case 7:  return TOUCH_PAD_NUM6;
+    case 8:  return TOUCH_PAD_NUM7;
+    case 9:  return TOUCH_PAD_NUM8;
+    case 10: return TOUCH_PAD_NUM9;
+    case 11: return TOUCH_PAD_NUM10;
+    case 12: return TOUCH_PAD_NUM11;
+    case 13: return TOUCH_PAD_NUM12;
+    case 14: return TOUCH_PAD_NUM13;
+    case 15: return TOUCH_PAD_NUM14;
+    default: return kInvalidTouchPad;
+  }
+}
+
+int touch_pad_to_pin_num(touch_pad_t pad) {
+  switch (pad) {
+    case TOUCH_PAD_NUM1:  return 2;
+    case TOUCH_PAD_NUM2:  return 3;
+    case TOUCH_PAD_NUM3:  return 4;
+    case TOUCH_PAD_NUM4:  return 5;
+    case TOUCH_PAD_NUM5:  return 6;
+    case TOUCH_PAD_NUM6:  return 7;
+    case TOUCH_PAD_NUM7:  return 8;
+    case TOUCH_PAD_NUM8:  return 9;
+    case TOUCH_PAD_NUM9:  return 10;
+    case TOUCH_PAD_NUM10: return 11;
+    case TOUCH_PAD_NUM11: return 12;
+    case TOUCH_PAD_NUM12: return 13;
+    case TOUCH_PAD_NUM13: return 14;
+    case TOUCH_PAD_NUM14: return 15;
+    default: return -1;
+  }
+}
+
 #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
 
 static touch_pad_t get_touch_pad(int pin) {
@@ -228,7 +270,7 @@ PRIMITIVE(use) {
   ByteArray* proxy = process->object_heap()->allocate_proxy();
   if (proxy == null) FAIL(ALLOCATION_FAILED);
 
-#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
   esp_err_t err = touch_pad_config(pad);
   if (err == ESP_OK) {
     err = touch_pad_set_thresh(pad, threshold);

diff --git a/src/resources/uart_esp32.cc b/src/resources/uart_esp32.cc
@@ -47,7 +47,13 @@
 #define UART_NUM_2             (static_cast<uart_port_t>(2)) /*!< UART port 2 */
 #endif
 #if SOC_UART_HP_NUM > 3
-#error "SOC_UART_HP_NUM > 3"
+#define UART_NUM_3             (static_cast<uart_port_t>(3)) /*!< UART port 3 */
+#endif
+#if SOC_UART_HP_NUM > 4
+#define UART_NUM_4             (static_cast<uart_port_t>(4)) /*!< UART port 4 */
+#endif
+#if SOC_UART_HP_NUM > 5
+#error "SOC_UART_HP_NUM > 5"
 #endif
 #define UART_NUM_MAX           (SOC_UART_HP_NUM) /*!< UART port max */
 
@@ -59,7 +65,13 @@ static periph_module_t module_from_port(uart_port_t port) {
     case UART_NUM_2: return PERIPH_UART2_MODULE;
 #endif
 #if SOC_UART_HP_NUM > 3
-#error "SOC_UART_HP_NUM > 3"
+    case UART_NUM_3: return PERIPH_UART3_MODULE;
+#endif
+#if SOC_UART_HP_NUM > 4
+    case UART_NUM_4: return PERIPH_UART4_MODULE;
+#endif
+#if SOC_UART_HP_NUM > 5
+#error "SOC_UART_HP_NUM > 5"
 #endif
     default:  // Includes LP uarts.
       UNREACHABLE();
@@ -85,6 +97,12 @@ static ResourcePool<uart_port_t, kInvalidUartPort> uart_ports(
 #if SOC_UART_HP_NUM > 2
   , UART_NUM_2
 #endif
+#if SOC_UART_HP_NUM > 3
+  , UART_NUM_3
+#endif
+#if SOC_UART_HP_NUM > 4
+  , UART_NUM_4
+#endif
 );
 
 typedef enum {

diff --git a/src/resources/uart_esp32_hal.c b/src/resources/uart_esp32_hal.c
@@ -17,6 +17,13 @@
 // Therefore we don't test for `TOIT_ESP32` but for `ESP_PLATFORM`.
 #if defined(ESP_PLATFORM)
 
+// TODO(floitsch): this is a hack to get p4 working. It means that the UART
+// (uart_ll_set_baudrate, uart_ll_enable_pad_sleep_clock, ...) isn't correctly
+// protected anymore.
+#ifndef __DECLARE_RCC_ATOMIC_ENV
+#define __DECLARE_RCC_ATOMIC_ENV ((void)0)
+#endif
+
 #include "esp_attr.h"
 #include "uart_esp32_hal.h"
 #include "hal/uart_hal.h"