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@trabucayre trabucayre released this 12 Sep 14:05
· 19 commits to master since this release
v1.0.0
1fc7539

Evolution summary:

core

new

  • common: added function to split a string to a vector by using a delimiter
  • jtag: added method to retrieves number of devices in the JTAG chain
  • main: added detect_flash in SPI Mode and with a manufacturer
  • 99-openfpgaloader.rules: added entry for ULX3S/ULX4M (DFU mode)
  • 99-openfpgaloader.rules: update
  • 99-openfpgaloader.rules: added rule for ESP32S3
  • README.md: added list of sponsors (hardware/boards and/or features funder)

update

  • jtag: allows caller to specify tdi level in toggleClk method
  • ci: add ubuntu 24
  • main: list_boards now displays fpga_part too
  • main: list_boards: print 'Undefined' when fpga_part or cable_name is empty
  • main, board: added --pins argument compatible with SPI mode
  • progressBar: added eol for each progressBar update when no STDOUT_FILENO
  • display: std::endl -> \n
  • device: added verbose_level attribute

fix

  • fix: update version to patch with the release
  • fix to have an happy CI
  • CI: Removed ubuntu-20.02 build/test
  • make ENABLE_OPTIM non effective for Debug builds configuration
  • Fix snprintf usage
  • main: SPI mode without board: check file_size (must be > 0)
  • .github/workflows/Test.yml: fixed CI with windows
    (msys2/setup-msys2 master looks broken)

board

new

  • Add support for Numatolab Neso board. Programming SRAM over USB works, when
    board jumpers are set for JTAG programming mode. SPI flashing does not work
    properly (does not boot).
  • Add icepi zero to board.hpp
  • Add support for Digilent Anvyl, the Big Red Board.
  • board, efinix: added SPI variant for efinix t20 BGA256 board
  • board: added ULX4M (DFU)
  • Adding support for Open Source SDR Lab Kintex-7 325t FPGA PCIE Development Board
  • Added alinx_ax7203 and alinx_ax7201 boards
  • Added STEP-MAX10 V1 support.
  • Added STEP-MXO2_V2 board support.
  • Add support for MILIANKE-S200-EG4D20 and update document

update

  • kcu105: add fpga package in description
  • kcu105: add secondary qspi detection and dump

cable

new

  • esp_usb_jtag: new cable
    • copy dirtyjtag to esp_usb_jtag, it compiles
    • copy protocol definiton, defines and private data/struct from openocd
      esp_usb_jtag.c
    • ulx3s_esp board with esp32s3 cable
    • esp_usb_jtag specify usb vid:pid in jtag.cpp
    • hardcode usb interface and endpoints
    • getting caps
    • set chip id (not applicable for fpga)
    • tms write done, untested
    • cleanup and toggle clk
    • 32bit counting
    • setting divisor (todo read base freq)
    • div range within 1-255
    • base speed from descriptor
    • fix doc typo with swapped tms/tdi some cleanup but it doesn't work.
  • adds GCM board type and FT4232H interface B cable
  • anlogicCable: Fix wrong ANLOGICCABLE_VIDv1
  • libgpiodJtagBitbang: add support for XVC server
  • Add cable support for ARM-USB-TINY-H based off ARM-USB-OCD-H
  • cable: added Altera USB Blaster III (missing link in doc)

update

  • anlogicCable: refresh with new VID
  • anlogicCable: added pinout + link
  • ftdispi: ft2232_spi_wr_and_rd: improved error messages
  • dirtyJtag: added SRST/TRST values. Added method to read/set GPIOs level
  • esp_usb_jtag: improves
    • esp_usb_jtag: added xfer method to handle/simplify libusb_bulk_transfer calls
    • src/esp_usb_jtag.cpp: simplify some operations
    • src/esp_usb_jtag.cpp: writeTDI: fixed rx buffer index, added a basic code
      to handle end transaction
    • src/esp_usb_jtag.cpp: writeTMS: store and uses _tdi & _tms
    • src/esp_usb_jtag.cpp: toggleClock: re-uses _tdi/_tms
    • src/esp_usb_jtag.cpp: writeTDI: ditto
    • esp_usb_jtag: fixed verbosity level/be more quiet
    • esp_usb_jtag: fixed writeTDI with end and tms transition: now integrated
      instead of distinct sequence. Fixed TDI value with tms transition. Working with ECP5
    • esp_usb_jtag: added optional parameter to lower timeout error (useful when
      it's time to flush the device)
  • esp_usb_jtag: added support for espressif esp-usb-bridge firmware
  • esp_usb_jtag: added reference to esp32s3-jtag repository
  • libusb_ll/scan: improved display by align column according to max size (#549)
  • cmsisDAP: Avoid memcpy() on possibly overlapping buffer
  • Update ch347jtag.cpp

fix

  • anlogicCable: fixed typo
  • ftdispi: lowlevel init/MPSSE configuration before pins manipulation (issue #519)
  • ftdispi: ft2232_spi_wr_and_rd: use dedicated buffer for MPSSE command to
    avoid overflow. Simplify code, improve error message (issue #524 and
  • ftdispi: fixed ft2232_spi_wr_and_rd: buffer is empty when transaction is read-only
  • esp_usb_jtag: fixed writeTDI when tx is NULL
  • libusb_ll: probe type -> probe_type
  • xvc_server: Make thread exit cleanly (#526)
  • libusb_ll,ftdipp_mpsse: Bus and Device must be both == 0 to use filter or uses VID/PID

part

new

  • Altera Cyclone 10 LP 10CL080
  • Altera Max10 10M02SCM153C8G
  • Altera Cyclone IV EP4CE30
  • Xilinx: xc7s75
  • Xilinx: Artix A7 15t
  • Xilinx: xc7k480t
  • Xilinx: xc7a50tcsg325
  • Xilinx: xcau15p (xcau15p_ffvb676) support (#547)
  • Lattice: added ECP3 family support (SRAM only)
  • latticeSSPI: ECP5 driver for Slave SPI mode
  • Lattice ECP3 LFE3-70E
  • Gowin: Arora V GW5AT-60 Variant

update

  • Altera: MAX10: added pgm_success_addr/done_bit_addr
  • Altera: MAX10 fully rework POF to internal flash mapping, added UFM write and note related to internal flash sections vs POF UFM/CFM sections
  • Altera: cosmetic/linter
  • Altera: added internal flash dump support for MAX10 devices
  • Altera: MAX10: added --flash-sector support with arbitrary binary file
  • Altera: MAX10: only keep size+Single(S)/Dual-supply(D). Sort between single-supply and dual-supply
  • Altera: added sectors erase and UFM write
    • updated max10_mem_t to have sectors erase addresses
    • updated max10_flow_erase to perform a full erase or sectors per sectors
    • added a dedicated method to perform UFM erase and write without full internal flash erase and with arbitrary file instead of POF
  • Colognechip: added a workaround to drive reset pin with DirtyJTAG cable (requires a recent DirtyJTAG firmware)
  • Colognechip: Simplify number of jtag bypass bits
  • Colognechip: remove unnecessary code in set_quad_bit and
    bulk_erase_flash
  • Colognechip: add bulk erase + quad enable features and simplify
    spi_wait overload
  • Gowin: Improved eraseSRAM/SPI Flash prepare for Arora V devices
  • Gowin: added (undocumented) sequence to be performed when CRC Error bit is set
  • LatticeSSPI: uses registers struct for status

fix

  • Altera: max10_program: respect _verbose variable
  • Altera: max_10 -> max10
  • Altera: fixed UFM: MAX10 memory is in reverse order, UFM1 is BEFORE UFM0
  • Altera: added max10_mem_t in max10_memory_map for 10M16SA Max10 variant
  • Altera: uses --flash-sector to only update a subset of internal flash sectors
  • Altera: fix Wc99-designator
  • Altera,libusb_ll,mcsParser: fix some compiler's warnings
  • Altera: fixed cyclone III/IV/10 LP IDCODE (same code for all
    families)
  • Colognechip: performs reset after SPI Flash write
  • Efinix: programJTAG. Fixed IDCODE read 4 -> 32 (issue #520)
  • Gowin: Arora V: fix SRAM erase/load when flash is blank and timeout bit is set
  • Gowin: Fix compilation on musl
  • Lattice: Fix incompatibility with Lattice FPGA
  • Lattice ice40: added detect_flash support
  • Lattice ice40: uses verbose_level for SPIFlash instead of verbose/quiet (#555)
  • Lattice ice40: Reuses prepare_flash_access/post_flash_access as much as possible. Removed dupplicated Flash dump informations. Be coherent to status message
  • Xilinx: adapted code to support existing spiOverJtag bitstreams (v1) and new bitstreams (v2)

files

update

  • pofParser: added flag 0x13 parsing with usercode extract
  • pofParser: flag 0x11: added unknown section when verbose
  • pofParser: getData/getLength: check if section exists: return data/length or null/-1
  • pofParser: parseHeader: better message + note
  • pofParser: displayHeader: improve messages
  • ihexParser: added type 04 (Extented Linear Address Record) and 05 (Start Linear Address Record)
  • mcsParser: _bit_length/buffer size / addr sanity check
  • mcsParser: check if _bit_data size is not larger than bitstream

fix

  • pofParser: honour CFM1/CFM2 data pointer
  • mcsParser: fixed warnings

spiFlash

new

  • added 1.35v csg325 build and Macronix flash
  • Added support for Everspin MRAM (EM008LX, EM016LX, EM032LX and EM064LX)
  • spiFlash, spiFlashdb: added global_lock flag and uses it instead of jedec_id (#566)
  • Added support for MX25L25645G FLASH memory
  • spiFlashdb: added XTX XT25F32B-S chip
  • spiFlashdb: add AT25QL321

update

  • spiFlash: only uses spi_put with distinct cmd parameter
  • spiFlashdb.hpp: disables quad mode configuration for all N25Q. It's useless
    because the chip is able by default to support single and quad transaction and
    after this configuration the flash is unable to works in single mode.
  • spiFlash: dump: honour _verbose level

fix

  • spiFlash: cosmetic 'Read flash ' -> 'Reading' (#558)
  • spiFlash: mask RDSR_WIP instead of RDSR_WEL while waiting
    for completion

spiOverJtag

new

  • spiOverJtag: introduce a new spiOverJtag (v2) core able to work with complex JTAG chain
  • spiOverJtag: add xc7s75fgga676

update

  • spiOverJtag: reworks Artix and Spartan 7 approach: For a specific FPGA size,
    pins name is only a matter of package, internally physical pads are the
    same: a unique bitstream per size is necessary. This also simplify build.py
    by removing complexity to extract model, size and package.
  • spiOverJtag/build.py: added default value for model variable
  • spiOverJtag/.gitignore: ignore vivado files

doc

new

  • doc/guide/install.rst: udev rules instructions under GuixSystem.
  • doc/FPGAs.yml: added Gowin Arora V GW5AT-60 Variant. Reorganized Gowin section
  • doc/boards.yml, src/board.py: added tangconsole entry
  • doc/boards: added alinx_ax7201/alinx_ax703 entries.
  • doc/cable: added arm-usb-tiny-h reference
  • doc/FPGAs,doc/vendors/lattice: added Lattice ECP3
  • doc: add kcu105 dual qspi command examples
  • Add entry about updating firmware TangNano20K

update

  • doc/vendors/intel.rst: improved MAX10 section

fix

  • doc/boards.yml,src/board.hpp: fixed ac701 device code
  • doc/vendors/intel.rst: fixed section/subsection for MAX10
  • doc/FPGAs.yml: Fix yml structure in Intel Max 10

Contributors

Contributors

duskwuff, Frozen, and 26 other contributors
Assets 8
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