[AMD] Add enableMISched option to MIR swap pipeline#9448
Merged
antiagainst merged 1 commit intotriton-lang:mainfrom Feb 13, 2026
Merged
[AMD] Add enableMISched option to MIR swap pipeline#9448antiagainst merged 1 commit intotriton-lang:mainfrom
antiagainst merged 1 commit intotriton-lang:mainfrom
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Allow optionally re-enabling the LLVM machine instruction scheduler when swapping in externally-modified MIR files, controlled by TRITON_SWAP_MIR_ENABLE_MISCHED. Validates that the flag is only set when TRITON_SWAP_MIR is also set.
tyb0807
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antiagainst,
ptillet and
zhanglx13
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antiagainst
approved these changes
Feb 13, 2026
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Allow optionally re-enabling the LLVM machine instruction scheduler when swapping in externally-modified MIR files, controlled by TRITON_SWAP_MIR_ENABLE_MISCHED. Validates that the flag is only set when TRITON_SWAP_MIR is also set.
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