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Chipyard 1.6.0

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@abejgonzalez abejgonzalez released this 16 Feb 14:45
· 3100 commits to main since this release
1.6.0
dcf8da4
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Learn about vigilant mode.

Chipyard 1.6.0 is now released! Improvements include FSDB waveform support in simulation, new GitHub Actions based CI, support for the Ibex core, updated versions of many subprojects including Gemmini/Hammer/FireSim, new FFT generator, various quality-of-life improvements, and much more. This release is the 1st release where development will move to the main branch of the repository and future releases will be on a tagged branch/commit (see https://github.com/ucb-bar/chipyard/blob/dcf8da4b2d3a4deead95462fce36a6db5693ed45/CONTRIBUTING.md for more details).

A more detailed account of everything included is included in the dev to master PR for this release: #913

Added

  • Diplomatic IOBinder-like approach to setting up PRCI across different deployment targets (#900)
  • Default set of MMIO-controlled reset-setters and clock-gaters (#900)
  • Added simulation makefile options torture and torture-overnight for running Torture (#992)
  • FSDB waveform support (#1072, #1102)
  • Use GitHub Actions for CI (#1004, #999, #1090, #1092)
  • Add MAKE variable in build-toolchains.sh (#1021)
  • Cleanup GH issue and PR templates (#1029, #1032)
  • Add support for Ibex core (#979)
  • Add system bus width fragment (#1071)
  • Add support for FSDB waveform files (#1072, #1102)
  • Document simulator timeout settings (#1094)
  • Add FFT Generator (#1067)
  • Add waveforms for post-PNR and power (#1108)
  • Have PRCI control registers use clock of corresponding bus (#1109)
  • Add check to verify that user is running on tagged release (#1114)
  • Hammer tutorial in Sky130 (#1115)

Changed

  • Bump CVA6 (#909 )
  • Bump Hammer tutorial for ASAP7 r1p7 (#934)
  • Use Published Chisel, FIRRTL, Treadle, FIRRTLInterpreter packages instead of building from source. #1054
  • Change serialTL width to 32. Speeds up simulations (#1040)
  • Update how sbt flag is overridden (by using SBT_BIN variable) (#1041)
  • Use published dependencies for Chisel, FIRRTL, Treadle, and FIRRTLInterpreter (#1054)
  • Split ConfigFragments.scala into multiple files (with more organization) (#1061)
  • Avoid initializing nvdla software by default (#1063)
  • Update ASAP to 1.7 in Hammer (#934)
  • Shorten Gemmini docs and point to repo (#1078)
  • Bump Gemmini to 0.6.2 (#1083)
  • Use python2 for tracegen script (#1107)
  • Bump to Chisel/FIRRTL 3.5.1 (#1060, #1113)
  • Bump to FireMarshal 1.12.1 (#1116)
  • Bump to FireSim 1.13.0 (#1118 )

Fixed

  • Fix UART portmap for Arty (#968)
  • Support changing make variable MODEL from the cmdline (#1030)
  • Force FIRRTL to 1.4.1 (#1052)
  • Fix MMIO IOBinder (#1045)
  • Mask fd warning when running make (#1057)
  • Fix Sodor 5-stage hazard check (#1086)
  • Fix Sodor val io issue (#1089)
  • Fix BOOM reference in Readme (#1104)
  • Fix waveforms for post-P&R power analysis (#1108)

Removed

  • Remove duplicate WithUARTIOCells fragment (#1047)
  • Remove MaxPermSize in java variables (#1082)
  • Remove support for CircleCI (#1105)
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