Draft: Initial PRCI drivers for Bearly and DSP #5
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jasmangle
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jasmangle
changed the title
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Was this tested btw? (is 100% chill if not) |
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It's tested and doesn't work since the memory map for our chips last year is kinda wacky for prci (and doesnt actually have tile reset setters). I don't have time to fix at the moment, but upstream Baremetal should be fine for now. |
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Not at a computer at the moment, but a small change to move the CLOCK_SELECTOR out of intel pll driver should be all that is needed. |
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Bump (maybe around now is a good time to get the merges sorted out?) |
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Shifts delegation of clock selection assignment to an overall PRCI struct to account for the rest of the reset/clock division functionality.
Need to test on 2025-02-25, will update this PR once I've tested this driver.