Bump toolchains/riscv-tools/riscv-isa-sim from 7812eab to f6d41bc#39
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Bumps [toolchains/riscv-tools/riscv-isa-sim](https://github.com/riscv-software-src/riscv-isa-sim) from `7812eab` to `f6d41bc`. - [Release notes](https://github.com/riscv-software-src/riscv-isa-sim/releases) - [Commits](riscv-software-src/riscv-isa-sim@7812eab...f6d41bc) --- updated-dependencies: - dependency-name: toolchains/riscv-tools/riscv-isa-sim dependency-type: direct:production ... Signed-off-by: dependabot[bot] <support@github.com>
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Superseded by #43. |
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Bumps toolchains/riscv-tools/riscv-isa-sim from
7812eabtof6d41bc.Commits
f6d41bcMerge pull request #1901 from binno/cfi_fixesbdac989Raise store access fault as accessing undefined mmio region by SS instructions47cc7e8Ssrdp should write sign-extension value as xlen is 32c1d797aImplement elp state holding mechanism for mnstatus060bbd6Need zero extend for sspopchk compared vale3c61a0fMerge pull request #1937 from ved-rivos/0317f440af1Shadow stack inst should cause samo access fault947b394Merge pull request #1934 from NXP/update-zilsd-zmlsd-versions51b32b4Zilsd and Zclsd moved to ratified version3f79e3bMerge pull request #1930 from aap-sc/aap-sc/abits_len_fixupDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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