Fix unaligned 64-bit atomic operation panic on ARM architecture

[Copilot]

This PR fixes a critical runtime panic that occurs when running memos on ARM-based systems like Raspberry Pi 4B:

panic: unaligned 64-bit atomic operation

goroutine 1 [running]:
internal/runtime/atomic.panicUnaligned()
	/usr/local/go/src/internal/runtime/atomic/unaligned.go:8 +0x24
internal/runtime/atomic.Xadd64(0x313b894, 0x1)
	/usr/local/go/src/internal/runtime/atomic/atomic_arm.s:318 +0x14
github.com/usememos/memos/store/cache.(*Cache).SetWithTTL(...)
	/home/aldar/memos/store/cache/cache.go:107 +0x158

Root Cause

On ARM 32-bit architecture, 64-bit atomic operations require 8-byte memory alignment. The itemCount int64 field in the Cache struct was not guaranteed to be 8-byte aligned because it appeared after other fields that could have irregular sizes:

type Cache struct {
	data       sync.Map   // Variable size
	config     Config     // Multiple fields
	itemCount  int64      // ❌ Not aligned!
	stopChan   chan struct{}
	closedChan chan struct{}
}

Solution

Moved the itemCount field to the beginning of the struct to ensure proper 8-byte alignment on all architectures:

type Cache struct {
	itemCount  int64      // ✅ Always aligned at struct start
	data       sync.Map
	config     Config
	stopChan   chan struct{}
	closedChan chan struct{}
}

This is a common Go pattern for fixing atomic alignment issues and ensures the field is properly aligned regardless of the target architecture.

Testing

• Added comprehensive alignment verification tests
• Verified all existing cache functionality continues to work correctly
• Successfully cross-compiled for both ARM 32-bit (linux/arm) and ARM64 (linux/arm64) architectures
• Confirmed no regression in existing test suite

The fix is minimal, surgical, and follows Go best practices for atomic field alignment.

Fixes #4811.

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