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Add proper CPUID eax checking #3026
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Initial review.
@@ -71,6 +71,19 @@ void run_cpuid(uint32_t eax, uint32_t ecx, uint32_t * abcd) | |||
#endif | |||
} | |||
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uint32_t __daal_internal_get_max_extension_support() |
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This function is not necessary, it can be folded in below.
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This follows the pattern of __daal_internal_is_intel_cpu
and daal_check_is_intel_cpu
where the former is the one that does the work and the latter is there to cache the value in a static variable to avoid running the former multiple times.
@@ -71,6 +71,19 @@ void run_cpuid(uint32_t eax, uint32_t ecx, uint32_t * abcd) | |||
#endif | |||
} | |||
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uint32_t __daal_internal_get_max_extension_support() | |||
{ | |||
uint32_t abcd[4]; |
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clearer naming is necessary.
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The naming used is abcd
throughout this file. This variable stores the values of the eax, ebx, ecx, edx
registers just like the other functions. Any ideas on what to rename all of them to?
@@ -193,7 +211,7 @@ static int check_sse42_features() | |||
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DAAL_EXPORT bool __daal_serv_cpu_extensions_available() | |||
{ | |||
return daal_check_is_intel_cpu(); | |||
return 1; |
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First, if a bool, it would be best to return a bool. Secondly, if this is a no-op, then the function should be removed.
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I removed the function and its usages.
Thanks for the review @icfaust |
@icfaust what are the next steps for this PR? |
@isuruf I think addressing uxlfoundation/scikit-learn-intelex#1000 may take priority, though I will defer to code owners on this. I think testability is key, and this PR may cover up an underlying issue. |
Yeah, it will cover up an underlying issue in |
Ping on this |
/intelci: run |
I think those can be separated. One is changing detection of instructions which is ok. There are several reasons why this wasn't touched from the beginning - there is no AMD specific validation or maintainers for it with responsibility over those. It's simple with this change and i wouldn't expect issues there, but there are other things that are enabled specifically on Intel just to reduce potential problems. On sse2 problem - i think it might be not specific to sse2 as there is no specialization there and this is what get compiled by default. though it was not reported for other platforms. |
/intelci: run |
/intelci: run |
@isuruf Please rebase the branch. It looks like the tests are failing in pre-commit because some fixes are missing in the branch. |
This makes it possible to use the sse42, avx2 code paths on AMD processors
✅ Branch has been successfully rebased |
@Mergifyio rebase |
✅ Nothing to do for rebase action |
/intelci: run |
Thanks everyone for the review and merge. |
thanks for contribution! |
This makes it possible to use the sse42, avx2 code paths on AMD processors
Description
Add a comprehensive description of proposed changes
List associated issue number(s) if exist(s): #6 (for example)
Documentation PR (if needed): #1340 (for example)
Benchmarks PR (if needed): IntelPython/scikit-learn_bench#155 (for example)
PR should start as a draft, then move to ready for review state after CI is passed and all applicable checkboxes are closed.
This approach ensures that reviewers don't spend extra time asking for regular requirements.
You can remove a checkbox as not applicable only if it doesn't relate to this PR in any way.
For example, PR with docs update doesn't require checkboxes for performance while PR with any change in actual code should have checkboxes and justify how this code change is expected to affect performance (or justification should be self-evident).
Checklist to comply with before moving PR from draft:
PR completeness and readability
Testing
Performance