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src: cpu: aarch64: Enable JIT fp16 -> fp16 reorder #3158
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Thanks for the PR. changes LGTM! |
No they are not. I will add them and update the PR |
…16 --ddt=f16 case
82 tests added to check the --sdt=f16 --ddt=f16 case |
@@ -11,7 +11,7 @@ | |||
--dtag=gOIhw4i8o2i 4x16x16x3x3 2x16x6x3x2 2x2x10x2x3 | |||
--dtag=gOIhw4o8i2o 4x16x16x3x3 2x16x6x3x2 2x2x10x2x3 | |||
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--sdt=f16 --ddt=f32,bf16,s8,u8,f8_e5m2,f8_e4m3 | |||
--sdt=f16 --ddt=f16,f32,bf16,s8,u8,f8_e5m2,f8_e4m3 |
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this is redundant, isn't it?
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Yes I think you're right.
@@ -1,6 +1,6 @@ | |||
# f32, s8, u8 <--> f16 | |||
--reset | |||
--sdt=f32,bf16,s8,u8,f8_e5m2,f8_e4m3 --ddt=f16 | |||
--sdt=f16,f32,bf16,s8,u8,f8_e5m2,f8_e4m3 --ddt=f16 |
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LGTM! this should be enough.
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lgtm
Description
This PR adds support for fp16 JIT reorder for data type f16->f16.
General
make test
andmake test_benchdnn_*
) pass locally for each commit?Performance improvements
Below are small test case logs that demonstrate performance numbers before and after.
./tests/benchdnn/benchdnn --reorder --sdt=f16 --ddt=f16 --stag=abc --dtag=aBc8b --mode=p 1x4096x4096
(new) jit:uni:
total perf: min(ms):0.564941 avg(ms):1.01874
(old) simple:any:
total perf: min(ms):25.6047 avg(ms):27.257