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Replace all sort functions with stable sort #2525

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May 23, 2024
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4 changes: 2 additions & 2 deletions libs/librrgraph/src/base/rr_graph_obj.cpp
Original file line number Diff line number Diff line change
@@ -1041,7 +1041,7 @@ void RRGraph::set_node_segment(const RRNodeId& node, const RRSegmentId& segment_
*/
void RRGraph::partition_node_in_edges(const RRNodeId& node) {
//Partition the edges so the first set of edges are all configurable, and the later are not
auto first_non_config_edge = std::partition(node_in_edges_[node].begin(), node_in_edges_[node].end(),
auto first_non_config_edge = std::stable_partition(node_in_edges_[node].begin(), node_in_edges_[node].end(),
[&](const RREdgeId edge) { return edge_is_configurable(edge); }); /* Condition to partition edges */

size_t num_conf_edges = std::distance(node_in_edges_[node].begin(), first_non_config_edge);
@@ -1060,7 +1060,7 @@ void RRGraph::partition_node_in_edges(const RRNodeId& node) {
*/
void RRGraph::partition_node_out_edges(const RRNodeId& node) {
//Partition the edges so the first set of edges are all configurable, and the later are not
auto first_non_config_edge = std::partition(node_out_edges_[node].begin(), node_out_edges_[node].end(),
auto first_non_config_edge = std::stable_partition(node_out_edges_[node].begin(), node_out_edges_[node].end(),
[&](const RREdgeId edge) { return edge_is_configurable(edge); }); /* Condition to partition edges */

size_t num_conf_edges = std::distance(node_out_edges_[node].begin(), first_non_config_edge);
2 changes: 1 addition & 1 deletion vpr/src/draw/draw_basic.cpp
Original file line number Diff line number Diff line change
@@ -339,7 +339,7 @@ void draw_congestion(ezgl::renderer* g) {

return lhs_cong_ratio < rhs_cong_ratio;
};
std::sort(congested_rr_nodes.begin(), congested_rr_nodes.end(), cmp_ascending_acc_cost);
std::stable_sort(congested_rr_nodes.begin(), congested_rr_nodes.end(), cmp_ascending_acc_cost);

if (draw_state->show_congestion == DRAW_CONGESTED_WITH_NETS) {
auto rr_node_nets = collect_rr_node_nets();
2 changes: 1 addition & 1 deletion vpr/src/draw/draw_rr.cpp
Original file line number Diff line number Diff line change
@@ -816,7 +816,7 @@ void draw_rr_costs(ezgl::renderer* g, const vtr::vector<RRNodeId, float>& rr_cos
}
return rr_costs[lhs_node] < rr_costs[rhs_node];
};
std::sort(nodes.begin(), nodes.end(), cmp_ascending_cost);
std::stable_sort(nodes.begin(), nodes.end(), cmp_ascending_cost);

for (RRNodeId inode : nodes) {
float cost = rr_costs[inode];
4 changes: 2 additions & 2 deletions vpr/src/place/compressed_grid.cpp
Original file line number Diff line number Diff line change
@@ -84,10 +84,10 @@ t_compressed_block_grid create_compressed_block_grid(const std::vector<std::vect
}

//Uniquify x/y locations
std::sort(layer_x_locs.begin(), layer_x_locs.end());
std::stable_sort(layer_x_locs.begin(), layer_x_locs.end());
layer_x_locs.erase(unique(layer_x_locs.begin(), layer_x_locs.end()), layer_x_locs.end());

std::sort(layer_y_locs.begin(), layer_y_locs.end());
std::stable_sort(layer_y_locs.begin(), layer_y_locs.end());
layer_y_locs.erase(unique(layer_y_locs.begin(), layer_y_locs.end()), layer_y_locs.end());

//The index of an x-position in x_locs corresponds to it's compressed
2 changes: 1 addition & 1 deletion vpr/src/place/cut_spreader.cpp
Original file line number Diff line number Diff line change
@@ -446,7 +446,7 @@ std::pair<int, int> CutSpreader::cut_region(SpreaderRegion& r, bool dir) {
}

// sort blks based on raw location
std::sort(cut_blks.begin(), cut_blks.end(), [&](const ClusterBlockId a, const ClusterBlockId b) {
std::stable_sort(cut_blks.begin(), cut_blks.end(), [&](const ClusterBlockId a, const ClusterBlockId b) {
return dir ? (ap->blk_locs[a].rawy < ap->blk_locs[b].rawy) : (ap->blk_locs[a].rawx < ap->blk_locs[b].rawx);
});

4 changes: 2 additions & 2 deletions vpr/src/place/median_move_generator.cpp
Original file line number Diff line number Diff line change
@@ -131,8 +131,8 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_
}

//calculate the median region
std::sort(place_move_ctx.X_coord.begin(), place_move_ctx.X_coord.end());
std::sort(place_move_ctx.Y_coord.begin(), place_move_ctx.Y_coord.end());
std::stable_sort(place_move_ctx.X_coord.begin(), place_move_ctx.X_coord.end());
std::stable_sort(place_move_ctx.Y_coord.begin(), place_move_ctx.Y_coord.end());

limit_coords.xmin = place_move_ctx.X_coord[floor((place_move_ctx.X_coord.size() - 1) / 2)];
limit_coords.xmax = place_move_ctx.X_coord[floor((place_move_ctx.X_coord.size() - 1) / 2) + 1];
4 changes: 2 additions & 2 deletions vpr/src/place/noc_place_utils.cpp
Original file line number Diff line number Diff line change
@@ -883,8 +883,8 @@ bool noc_routing_has_cycle() {
static std::vector<NocLinkId> find_affected_links_by_flow_reroute(std::vector<NocLinkId>& prev_links,
std::vector<NocLinkId>& curr_links) {
// Sort both link containers
std::sort(prev_links.begin(), prev_links.end());
std::sort(curr_links.begin(), curr_links.end());
std::stable_sort(prev_links.begin(), prev_links.end());
std::stable_sort(curr_links.begin(), curr_links.end());

// stores links that appear either in prev_links or curr_links but not both of them
std::vector<NocLinkId> unique_links;
4 changes: 2 additions & 2 deletions vpr/src/place/place.cpp
Original file line number Diff line number Diff line change
@@ -2393,8 +2393,8 @@ static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks) {
}

//Sort in ascending order, from the worse slack value to the best
std::sort(original_setup_slacks.begin(), original_setup_slacks.end());
std::sort(proposed_setup_slacks.begin(), proposed_setup_slacks.end());
std::stable_sort(original_setup_slacks.begin(), original_setup_slacks.end());
std::stable_sort(proposed_setup_slacks.begin(), proposed_setup_slacks.end());

//Check the first pair of slack values that are different
//If found, return their difference
2 changes: 1 addition & 1 deletion vpr/src/place/timing_place_lookup.cpp
Original file line number Diff line number Diff line change
@@ -871,7 +871,7 @@ float delay_reduce(std::vector<float>& delays, e_reducer reducer) {
auto itr = std::max_element(delays.begin(), delays.end());
delay = *itr;
} else if (reducer == e_reducer::MEDIAN) {
std::sort(delays.begin(), delays.end());
std::stable_sort(delays.begin(), delays.end());
delay = vtr::median(delays.begin(), delays.end());
} else if (reducer == e_reducer::ARITHMEAN) {
delay = vtr::arithmean(delays.begin(), delays.end());
4 changes: 2 additions & 2 deletions vpr/src/place/weighted_median_move_generator.cpp
Original file line number Diff line number Diff line change
@@ -95,8 +95,8 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved&
}

//calculate the weighted median region
std::sort(place_move_ctx.X_coord.begin(), place_move_ctx.X_coord.end());
std::sort(place_move_ctx.Y_coord.begin(), place_move_ctx.Y_coord.end());
std::stable_sort(place_move_ctx.X_coord.begin(), place_move_ctx.X_coord.end());
std::stable_sort(place_move_ctx.Y_coord.begin(), place_move_ctx.Y_coord.end());

if (place_move_ctx.X_coord.size() == 1) {
limit_coords.xmin = place_move_ctx.X_coord[0];
2 changes: 1 addition & 1 deletion vpr/src/route/DecompNetlistRouter.tpp
Original file line number Diff line number Diff line change
@@ -128,7 +128,7 @@ void DecompNetlistRouter<HeapType>::route_partition_tree_node(tbb::task_group& g
* nets use their own #fanouts. */
std::vector<size_t> order(node.nets.size() + node.vnets.size());
std::iota(order.begin(), order.end(), 0);
std::sort(order.begin(), order.end(), [&](size_t i, size_t j) -> bool {
std::stable_sort(order.begin(), order.end(), [&](size_t i, size_t j) -> bool {
ParentNetId id1 = i < node.nets.size() ? node.nets[i] : node.vnets[i - node.nets.size()].net_id;
ParentNetId id2 = j < node.nets.size() ? node.nets[j] : node.vnets[j - node.nets.size()].net_id;
return _net_list.net_sinks(id1).size() > _net_list.net_sinks(id2).size();
2 changes: 1 addition & 1 deletion vpr/src/route/ParallelNetlistRouter.tpp
Original file line number Diff line number Diff line change
@@ -42,7 +42,7 @@ void ParallelNetlistRouter<HeapType>::route_partition_tree_node(tbb::task_group&
auto& route_ctx = g_vpr_ctx.mutable_routing();

/* Sort so net with most sinks is routed first. */
std::sort(node.nets.begin(), node.nets.end(), [&](ParentNetId id1, ParentNetId id2) -> bool {
std::stable_sort(node.nets.begin(), node.nets.end(), [&](ParentNetId id1, ParentNetId id2) -> bool {
return _net_list.net_sinks(id1).size() > _net_list.net_sinks(id2).size();
});

2 changes: 1 addition & 1 deletion vpr/src/route/SerialNetlistRouter.tpp
Original file line number Diff line number Diff line change
@@ -12,7 +12,7 @@ inline RouteIterResults SerialNetlistRouter<HeapType>::route_netlist(int itry, f

/* Sort so net with most sinks is routed first */
auto sorted_nets = std::vector<ParentNetId>(_net_list.nets().begin(), _net_list.nets().end());
std::sort(sorted_nets.begin(), sorted_nets.end(), [&](ParentNetId id1, ParentNetId id2) -> bool {
std::stable_sort(sorted_nets.begin(), sorted_nets.end(), [&](ParentNetId id1, ParentNetId id2) -> bool {
return _net_list.net_sinks(id1).size() > _net_list.net_sinks(id2).size();
});

2 changes: 1 addition & 1 deletion vpr/src/route/cb_metrics.cpp
Original file line number Diff line number Diff line change
@@ -611,7 +611,7 @@ static void get_pin_locations(const t_physical_tile_type_ptr block_type, const e
}
}
/* sort the vector at the current side in increasing order, for good measure */
sort(pin_locations->at(iside).begin(), pin_locations->at(iside).end());
std::stable_sort(pin_locations->at(iside).begin(), pin_locations->at(iside).end());
}
}
/* now we have a vector of vectors [0..3][0..num_pins_on_this_side] specifying which pins are on which side */
2 changes: 1 addition & 1 deletion vpr/src/route/route_net.tpp
Original file line number Diff line number Diff line change
@@ -129,7 +129,7 @@ inline NetResultFlags route_net(ConnectionRouter& router,
}

// compare the criticality of different sink nodes
sort(begin(remaining_targets), end(remaining_targets), [&](int a, int b) {
std::stable_sort(begin(remaining_targets), end(remaining_targets), [&](int a, int b) {
return pin_criticality[a] > pin_criticality[b];
});

2 changes: 1 addition & 1 deletion vpr/src/route/router_lookahead_map_utils.cpp
Original file line number Diff line number Diff line change
@@ -671,7 +671,7 @@ t_routing_cost_map get_routing_cost_map(int longest_seg_length,

//Uniquify the increments (avoid sampling the same locations repeatedly if they happen to
//overlap)
std::sort(ref_increments.begin(), ref_increments.end());
std::stable_sort(ref_increments.begin(), ref_increments.end());
ref_increments.erase(std::unique(ref_increments.begin(), ref_increments.end()), ref_increments.end());

//Upper right non-corner
4 changes: 2 additions & 2 deletions vpr/src/route/router_lookahead_sampling.cpp
Original file line number Diff line number Diff line change
@@ -59,7 +59,7 @@ static std::vector<SamplePoint> choose_points(const vtr::Matrix<int>& counts,
vtr::Point<int> center = sample(window, 1, 1, 2);

// sort by distance from center
std::sort(points.begin(), points.end(),
std::stable_sort(points.begin(), points.end(),
[&](const SamplePoint& a, const SamplePoint& b) {
return manhattan_distance(a.location, center) < manhattan_distance(b.location, center);
});
@@ -232,7 +232,7 @@ std::vector<SampleRegion> find_sample_regions(int num_segments) {
compute_sample_regions(sample_regions, segment_counts, bounding_box_for_segment, num_segments);

// sort regions
std::sort(sample_regions.begin(), sample_regions.end(),
std::stable_sort(sample_regions.begin(), sample_regions.end(),
[](const SampleRegion& a, const SampleRegion& b) {
return a.order < b.order;
});
2 changes: 1 addition & 1 deletion vpr/src/route/rr_graph.cpp
Original file line number Diff line number Diff line change
@@ -3213,7 +3213,7 @@ static void build_rr_chan(RRGraphBuilder& rr_graph_builder,
}

void uniquify_edges(t_rr_edge_info_set& rr_edges_to_create) {
std::sort(rr_edges_to_create.begin(), rr_edges_to_create.end());
std::stable_sort(rr_edges_to_create.begin(), rr_edges_to_create.end());
rr_edges_to_create.erase(std::unique(rr_edges_to_create.begin(), rr_edges_to_create.end()), rr_edges_to_create.end());
}

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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time
k6_frac_N10_frac_chain_mem32K_40nm.xml LU8PEEng.v common 348.88 vpr 480.89 MiB 5.57 207028 -1 -1 101 121.37 -1 -1 108080 -1 -1 2196 114 44 8 exited with return code 2 c4c4d02-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-01-10T19:39:53 gh-actions-runner-vtr-auto-spawned7 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 492432 114 102 38224 33865 1 18116 2464 57 57 3249 clb auto 366.7 MiB 75.25 238374 1932124 720274 1178336 33514 397.8 MiB 80.74 0.64 69.2874 -55421.2 -69.2874 69.2874 1.23 0.112996 0.0916765 13.4398 11.1111 -1 -1 -1 -1 -1 -1 -1 32.95 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
k6_frac_N10_frac_chain_mem32K_40nm.xml LU8PEEng.v common 536.03 vpr 523.70 MiB 4.43 207232 -1 -1 101 112.61 -1 -1 108248 -1 -1 2196 114 44 8 success b93114b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:43:06 gh-actions-runner-vtr-auto-spawned22 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 536264 114 102 38224 33865 1 18116 2464 57 57 3249 clb auto 366.9 MiB 70.85 238374 1932124 720274 1178336 33514 435.4 MiB 73.41 0.55 69.2874 -55421.2 -69.2874 69.2874 1.11 0.103085 0.0834878 14.0392 11.6505 -1 342322 28 1.92089e+08 1.45633e+08 2.12617e+07 6544.09 24.82 22.4644 18.8613 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time
k6_N10_mem32K_40nm_fc_abs.xml stereovision3.v common 1.44 vpr 62.21 MiB -1 -1 0.41 25656 5 0.11 -1 -1 36124 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63700 10 2 181 183 1 40 24 6 6 36 clb auto 23.7 MiB 0.03 161 62.2 MiB 0.01 0.00 2.01366 -86.3479 -2.01366 2.01366 0.03 0.000102594 7.9786e-05 0.00251043 0.00215531 14 157 24 646728 646728 52871.9 1468.66 0.18 0.0402404 0.0333986 149 18 216 428 17304 4467 2.35792 2.35792 -101.81 -2.35792 0 0 63794.4 1772.07 0.01 0.01 0.00703407 0.00627384
arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time
k6_N10_mem32K_40nm_fc_abs.xml stereovision3.v common 1.82 vpr 63.97 MiB -1 -1 0.58 25532 5 0.16 -1 -1 36972 -1 -1 12 10 0 0 success b93114b release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-05-16T13:37:54 gh-actions-runner-vtr-auto-spawned30 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65508 10 2 181 183 1 40 24 6 6 36 clb auto 25.5 MiB 0.04 174 92 23 64 5 64.0 MiB 0.01 0.00 2.07517 -86.4376 -2.07517 2.07517 0.05 0.000355588 0.000315311 0.00287009 0.00268552 8 234 44 646728 646728 33486.6 930.184 0.21 0.0643387 0.0544077 1588 8314 -1 240 19 270 565 23832 7408 2.63212 2.63212 -118.257 -2.63212 0 0 42482.2 1180.06 0.01 0.03 0.01 -1 -1 0.01 0.0164962 0.0145092