[UT][PCP&DCP] UT for block_table.py

[pisceskkk]

Purpose

This PR add unit test for compute_slot_mapping function in block_table.py with various pcp_size & dcp_size & cp_kv_cache_interleave_size.

Test Plan

pytest tests/ut/worker/test_block_table.py

Test Result

==== 3 passed, 2 warnings in 0.20s ====

• vLLM version: v0.12.0
• vLLM main: vllm-project/vllm@ad32e3e

[github-actions]

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[wangxiyuan]

maybe we'll remove block table file later. Let's wait more. @MengqingCao