[ROCm] Retune MI355 selective_state_update float16 config on the unified effective_batch grid#48372
Merged
tomeras91 merged 10 commits intoJul 14, 2026
Conversation
…ied effective_batch grid Signed-off-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
tomeras91
approved these changes
Jul 13, 2026
NickLucche
pushed a commit
to NickLucche/vllm
that referenced
this pull request
Jul 15, 2026
…ied effective_batch grid (vllm-project#48372) Signed-off-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com> Co-authored-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
Re-tunes the AMD Instinct MI355X
selective_state_update(Mamba SSU decode kernel)cache_dtype=float16launch config onto the sameeffective_batchgrid already used by the MI300X (#47945) and MI350X (#48159) configs, so all AMD Instinct SSU configs are sampled on a uniform set of points.The original MI355 config (#47767) was keyed on a narrower, deployment-specific grid (
10 … 5120). This PR regenerates it on the standard grid (128 … 262144), matching MI300X/MI350X. Keyed oneffective_batch = batch * nheads, so a config transfers across (model, TP) combos sharing(headdim=64, dstate=128, cache_dtype). bf16 shares this file (the loader canonicalizes bf16 → float16, since the kernel only sees the state bit-width).This is purely a config re-tune for uniformity across the AMD Instinct line — no code changes.
How it was generated
Produced with the in-tree tuning script on an MI355X:
The device name and dtype key in the filename are derived automatically, so the file drops straight into
configs/selective_state_update/and is picked up at runtime with no code changes.Test plan
--validate: all tunedeffective_batchpoints pass against the CPU reference (12/12).--compare: consistent speedup over the generic heuristic across the swept grid.get_ssm_configs()resolvesdevice_name=AMD_Instinct_MI355_OAM,cache_dtype=float16.json(log:Using SSM config from .../cache_dtype=float16.json for selective_state_update); removing it logsUsing default Mamba SSU config. Performance might be sub-optimal!.lm_evallambada_openai (see Results).The config only selects Triton launch geometry (
BLOCK_SIZE_M,num_warps), not the kernel math, so model outputs are unaffected.Results
Perf —
selective_state_updatekernel, tuned vs the current heuristic (M=4, w=4), relative speedup frombenchmark_selective_state_update.py --compare:~1.2× at small batch (latency-bound), ~1.9–2.3× across the decode range.
Correctness — end-to-end, unchanged.
lm_evallambada_openai (500 examples), config present vs removed,AntonV/mamba2-2.7b-hf(headdim=64, dstate=128), fp16 activations, float16 SSM state cache:Identical acc and matching perplexity — expected, since the config only changes the Triton launch geometry, not the math.
Companion PR retunes the
float32variant on the same grid.