[Kernel] Extend Marlin atomic-add reduction to fused MoE

[hsamrat007]

Summary

• Apply the existing should_use_atomic_add_reduce policy to both Marlin
  fused-MoE GEMMs.
• Replace the fused-MoE path's hardcoded use_atomic_add=False with a per-GEMM
  decision using the actual (M, N, K), device, and activation dtype.
• Preserve the current default behavior: atomic reduction remains opt-in via
  VLLM_MARLIN_USE_ATOMIC_ADD=1.

Motivation

Dense Marlin already uses the atomic-add policy introduced in #14138, while the
current fused-MoE integration hardcodes the option off even though
moe_wna16_marlin_gemm supports it. This change restores policy parity for MoE
without changing the kernel or enabling experimental behavior by default.

Atomic reduction can avoid Marlin's lock/global-reduction path for eligible
GEMMs with a narrow output dimension and large reduction dimension. The benefit
is workload-dependent, so this PR deliberately reuses the existing opt-in
policy rather than introducing a new default.

Example eligibility under the existing n < 2048, k >= 2048 shape gates:

Model shape	GEMM1 (n=2I, k=H)	GEMM2 (n=H, k=I)
Qwen3-30B-A3B (H=2048, I=768)	eligible	ineligible
128-expert 26B MoE (H=2816, I=704)	eligible	ineligible
Mixtral-8x7B (H=4096, I=14336)	ineligible	ineligible

The existing helper also preserves its CUDA, environment-variable, and BF16
architecture checks.

Performance validation

Tested on NVIDIA GB10 (SM121) with BF16 activations and 4-bit weights.

vLLM serving: Qwen3-30B-A3B-GPTQ-Int4

Workload	Atomic OFF	Atomic ON	Delta
B=1, GSM8K greedy, 50 requests	82.7 tok/s	81.4 tok/s	-1.6%
Concurrency 8, 32 requests	256.6 tok/s	259.3 tok/s	+1.1%
Concurrency 32, 64 requests	516.9 tok/s	525.5 tok/s	+1.7%

The B=1 median was effectively unchanged (82.8 vs 83.0 tok/s); aggregate gains
appeared as the effective batch size increased.

DiffusionGemma custom decode stack

This comparison isolates atomic reduction while holding AWQ and
moe_block_size=32 fixed:

Configuration	GSM8K accuracy	Throughput
Block size 32, atomic OFF	46/50	303.6 tok/s
Block size 32, atomic ON	45/50	314.5 tok/s

Atomic reduction improved end-to-end throughput by 3.6% in this workload. The
accuracy counts are a coarse task-level sanity check, not a
numerical-equivalence claim.

Paired Marlin MoE-layer timing

With block size held at 32, paired/interleaved timing showed the isolated atomic
contribution tapering with token count:

Tokens	Atomic OFF	Atomic ON	Delta
64	1.95 ms	1.81 ms	+7%
128	2.16 ms	1.93 ms	+11%
256	2.08 ms	2.04 ms	+2%
512	2.34 ms	2.32 ms	+1%

Correctness and limitations

• The environment flag is off by default, so existing users see no behavior
  change.
• Atomic floating-point accumulation is order-dependent and may produce small
  ULP-level differences, matching the trade-off of the existing dense Marlin
  path.
• Validation above is from one SM121 system. The existing helper continues to
  reject unsupported or unsuitable device, dtype, and shape combinations.
• The GSM8K samples are end-to-end sanity checks; kernel numerical tests and
  project CI remain authoritative.

Test plan

• Verify that vLLM loads the patched fused-MoE path.
• Run atomic OFF/ON serving comparisons at B=1 and concurrency 8/32.
• Run paired/interleaved Marlin MoE-layer timing with block size fixed.
• Run an isolated DiffusionGemma block-size-32 OFF/ON comparison.
• Pass vLLM CI and existing Marlin/MoE kernel tests.

AI assistance disclosure

Claude and Cursor were used for non-trivial assistance during implementation,
validation, and PR preparation. The submitter reviewed the changed code and
validation results. The commit includes the corresponding Co-authored-by
trailer and DCO sign-off.

[claude]

Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

[github-actions]

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