Releases: w1ne/labwired-core
Release list
LabWired v0.17.3
Installation
curl -fsSL https://labwired.com/install.sh | shOr with a specific version:
LABWIRED_VERSION=v0.17.3 curl -fsSL https://labwired.com/install.sh | shSee the full changelog for what's new.
LabWired v0.17.2
Installation
curl -fsSL https://labwired.com/install.sh | shOr with a specific version:
LABWIRED_VERSION=v0.17.2 curl -fsSL https://labwired.com/install.sh | shSee the full changelog for what's new.
LabWired v0.17.1
Installation
curl -fsSL https://labwired.com/install.sh | shOr with a specific version:
LABWIRED_VERSION=v0.17.1 curl -fsSL https://labwired.com/install.sh | shSee the full changelog for what's new.
LabWired v0.17.0
Installation
curl -fsSL https://labwired.com/install.sh | shOr with a specific version:
LABWIRED_VERSION=v0.17.0 curl -fsSL https://labwired.com/install.sh | shSee the full changelog for what's new.
LabWired v0.16.0
Installation
curl -fsSL https://labwired.com/install.sh | shOr with a specific version:
LABWIRED_VERSION=v0.16.0 curl -fsSL https://labwired.com/install.sh | shSee the full changelog for what's new.
v0.15.0: dual-core ESP32 sim + Arduino-ESP32 / FreeRTOS bring-up
Added
- Dual-Core ESP32 / ESP32-S3 Simulation: Round-robin step loop with PRO_CPU / APP_CPU,
PRIDregister exposingxPortGetCoreID(), cross-core IPI bridge wiringDPORT_CPU_INTR_FROM_CPU_n_REGtriggers into the target CPU'sINTERRUPTbit soesp_crosscore_int_send_yieldlands. - Runtime Snapshot Subsystem:
Machine::with_secondary_cpu,Machine::{take,apply}_runtime_snapshot, CLIsnapshot capturesubcommand, WASMapply_runtime_snapshot(bytes)+take_runtime_snapshot(). Cold-boot collapses from 30 s to ~0.5 s in the playground. - Arduino-ESP32 / FreeRTOS Bring-Up Thunks (
crates/core/src/peripherals/esp32s3/rom_thunks.rs):abort_halt,esp_clk_cpu_freq_240mhz,x_queue_create_mutex_static_echo,x_task_get_current_task_handle,return_pd_true,spi_start_bus_fake,spi_class_begin_transaction(lazyspi_tinit withUSR_MOSIauto-enable),xQueueGiveMutexRecursive,esp_log_impl_lock, recursive-mutex create stubs,esp_ipc_init/esp_ipc_isr_initno-ops. - Loader Auto-Discovery:
extract_arduino_esp32_thunks+resolve_symbol_in_elfresolve HardwareSerial / SPI / mutex / log-lock / IPC-init symbols by name from the ELF's.symtab, so installed thunks gate strictly on symbol presence (stripped ELFs that don't import the symbol are untouched). - AgentDeck Boot Snapshot Pipeline: Captured post-paint state blob; playground replays the snapshot in ~0.5 s.
- Unified Demo Registry:
BoardConfig-drivenfetch-demo-firmware.shand per-board snapshot blobs. - Dual-Core PxList Diagnostic Dump: CLI flag dumps the kernel ready/delayed list state on both cores for diagnosing scheduler regressions.
Changed
- Xtensa
WSR.INTSETSemantics: SR id 226 writes now raise pending IRQ bits inINTERRUPTinstead of being silently dropped — required for FreeRTOSportYIELD()software interrupt to fire (crates/core/src/cpu/xtensa_sr.rs). - CCOMPARE0 Ack-on-Write: Writes ack bit 6 in
INTERRUPTand re-raise if the new compare value is already ≤CCOUNT, closing the silent-timer case where boot-allocator latency pushed the first compare pastCCOUNT(crates/core/src/cpu/xtensa_sr.rs). xTaskGetCurrentTaskHandle: Removed from genericnop_return_zerolist — now uses dedicated thunk readingpxCurrentTCB[core]via thePX_CURRENT_TCB_ADDRthread-local seed.- Fake
spi_tRegion: Moved out of the firmware DRAM allocator's reach (0x3FFD_F000→0x3FFF_FF00in SRAM1) to prevent silent overwrite by heap growth. return_pd_trueVisibility: Now emits a one-timetracing::warn!on first call so the stub's activation is loud in logs — future regressions where a take should block will be visible instead of silently succeeding.
Fixed
- IPC-Task Spin / Scheduler-Tick Starvation: Combined fix from
WSR.INTSETraisingSOFTWARE0andCCOMPARE0ack-and-rearm; AgentDeck and reader sketch both progress pastxQueueSemaphoreTakeintoapp_main/setup(). esp_newlib_locks_initAssertion Failure:xQueueCreateMutexStaticreturning 0 now echoes the static-buffer argument so the lock pointer is non-NULL.- GxEPD2 / SSD1680 SPI Writes Reach the Panel:
SPIClass::beginTransactionlazy init enablesUSER_REG.USR_MOSI(bit 27) when the sketch never callsSPI.begin()explicitly — reader sketch black-plane bytes 0 → 1,429 non-FF (29% glyph coverage) across 3 full refresh cycles, 19,039 SPI3 transactions. Print::print/Print::writeDispatch: Restored real virtual dispatch sodisplay.print("text")flowsPrint → Adafruit_GFX::write → drawChar → drawPixel; onlyHardwareSerial::writeand theuart*helpers stay stubbed.- Dead Inherent Watchpoint Removed:
SystemBus::write_u32/write_u16inherent watchpoint from #93 never fired (bus dispatch goes through trait impl) — code path removed. mkdocs.ymlDrift:repo_urltypo (libwired-core→labwired-core); nav entries pointing at nonexistentSUPPORTED_DEVICES.md,verification_audit.md,development/git_flow.mdcorrected or removed.SECURITY.md: Supported versions table updated to0.15.x; advisory URL corrected fromlabwiredtolabwired-core.- Example Lints: Cleared
clippy::identity_op,needless_range_loop,doc_overindented_list_items, and unused-variable warnings across sensor labs and firmware demos; gatedfirmware-f407-demoinline ARM asm behind#[cfg(target_arch = "arm")]so host clippy doesn't choke on it.
Playground demo firmware — v1
Pre-stripped firmware ELFs the labwired playground fetches at build time so they don't bloat git history.
Files
demo-agentdeck.elf(1.3 MB) — AgentDeck firmware, stripped of debug info from the 22 MB Arduino-ESP32 + GxEPD2 + Adafruit_GFX build (xtensa-esp32-elf-strip --strip-all). Byte-exact SPI output to the unstripped binary; renders "IDLE / Waiting for daemon / ATTACH / DECIDE / STOP" with 782 non-white black-plane bytes when stepped through 30M Xtensa cycles.
Why this repo (labwired-core) and not labwired
Releases here are public; the playground monorepo (labwired) is private. The fetch script in the playground prebuild hook needs an unauthenticated curl-able URL — a public release is the cleanest.
v0.14.0: Hardware-validated board expansion
Added
- ESP32-S3 / Xtensa LX7 Support: Added the Xtensa LX7 CPU backend, ESP32-S3 boot path, GPIO, interrupt matrix, SYSTIMER, ROM thunk, flash XIP, USB serial/JTAG, and I2C/TMP102 support.
- Hardware Oracle Harness: Ported the hardware-oracle capture/replay harness to the core repo, including OpenOCD/GDB capture tooling and fixture-backed oracle tests.
- Hardware-Validated STM32L476 Coverage: Added the NUCLEO-L476RG board package, modern STM32L4 peripherals, CubeMX-style HAL firmware coverage, and hardware trace fixtures.
- Hardware-Validated STM32F407 I2C Coverage: Added STM32F407 board configs, firmware, oracle captures, survival traces, and I2C sensor coverage for AHT20/BMP280 flows.
- Expanded Peripheral Models: Added or extended STM32L4/L4-style peripherals including PWR, FLASH, RNG, CRC, timers, RTC, watchdogs, DAC, EXTI, DMA, SDMMC, FMC, TSC, COMP, bxCAN, SAI, USB OTG, and QSPI.
- ISA and Snapshot Coverage: Added ARM Thumb-2 instructions, RISC-V atomics, async IRQ fixes, snapshot schema validation, ESP32-C3 survival coverage, and an ISA coverage matrix.
- Trace-Level Determinism Proof: Extended
determinism.rsto comparetrace.jsonSHA-256 hashes across 5 runs; added asdeterminism-proofCI gate. - Deterministic Trace Serialization: Switched
InstructionTrace.register_deltafromHashMaptoBTreeMapfor stable JSON key ordering. - Auto-Generated Compatibility Matrix:
scripts/generate_compat_matrix.pyenumerates chip configs and smoke test coverage; output uploaded as CI artifact. - Conditional Breakpoints: DAP breakpoints with
conditionandhitConditionexpression evaluation (register comparisons, hex/decimal literals). - Data Breakpoints:
supportsDataBreakpointsDAP capability; triggers on memory writes to watched addresses viaMemoryTracker. - Enhanced Evaluate Handler: DAP
evaluatesupports*(0xADDR)memory dereference andRn +/- offsetregister arithmetic. - Improved Disassembly: Thumb-2 32-bit instruction decoding in DAP disassemble handler;
decode_thumb_32re-exported from decoder module; source line correlation via DWARF symbols.
Changed
- Release Version: Workspace version updated to
0.14.0across workspace-managed crates. - Documentation Structure: Consolidated architecture docs, removed stale root-level junk and orphan changelog files, corrected stale
core/...subpath prefixes, and refreshed README positioning around hardware-validated parity. - Catalog Metadata: Refreshed onboarding target pass-rate metadata and board coverage tables for modeled chips.
- Build Profile: Enabled thin LTO for release builds.
Fixed
- I2C Fidelity: Closed STM32 I2C state-machine gaps exposed by F407 firmware and added runtime-attached AHT20/BMP280 component support.
- Cortex-M Fidelity: Fixed DBGMCU IDCODE behavior, vector-table handling, semihosting breakpoints, bit-band gating by architecture, and multiple Thumb-2 decode/execute gaps surfaced by hardware traces.
- DAP Robustness: Capped
readMemoryrequests and made board I/O matching exhaustive. - CI and Fixture Stability: Repaired workspace CI issues, RP2040 firmware configuration, nightly test failures, and firmware survival tests.
v0.12.2: Quality & Maintenance Release
Quality Improvements
- Applied cargo fmt across workspace
- Fixed 39 clippy warnings (unnecessary casts, redundant imports)
- Suppressed benign clippy warnings to ensure clean CI
- Removed unused GPIO constants
CI/CD
- All crates pass 'cargo check', 'cargo test', 'cargo fmt', and 'cargo clippy -D warnings'
- Documentation builds successfully
Notes
- This release establishes a trunk-based development baseline.
- 'demo_blinky' functional test failure is a known issue tracked for future fix.
v0.12.0: Documentation Overhaul & Architecture Unification
🚀 Highlights
Documentation Overhaul & Architecture Unification
This release introduces a completely restructured documentation site based on the Diataxis framework, alongside critical architectural improvements in the SVD transformation pipeline and CPU core instruction fidelity.
✨ New Features
- Documentation Overhaul: Migrated to MkDocs with Material theme, reorganized into Tutorials, How-To, Reference, and Explanation sections.
- Architecture Unification: Native ingestion of Strict IR (JSON) in the simulation core, bridging
labwired-irandlabwired-config. - Asset Foundry Hardening: Enhanced SVD transformation with flattened inheritance, register array unrolling, and cluster flattening.
- Timeline View: Professional visualization of instruction trace data in the VS Code extension.
🐛 Bug Fixes
- Critical Instruction Regression: Fixed
io-smokefailure by implementing proper Thumb-2IT(If-Then) block support in theCortexMcore. - Instruction Coverage: Expanded modular decoder and executor for
MOVW,MOVT,LDR.W,STR.W, andUXTB.W. - Structural Stability: Refactored CPU
steploop for improved variable scoping and exception handling consistency.
🛠 Improvements
- Support Strategy: Defined Tier 1 Device Support (STM32F4, RP2040, nRF52) in
SUPPORTED_DEVICES.md. - Core Guides: Added comprehensive
architecture_guide.mdandboard_onboarding_playbook.md.
📦 Dependency Updates
- Verified workspace-wide compatibility and version alignment for the 0.12.0 milestone.
Full Changelog: https://github.com/w1ne/labwired-core/blob/v0.12.0/CHANGELOG.md