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Polaris flight#8

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mgordon2646 wants to merge 7 commits intomainfrom
Polaris_Flight
Open

Polaris flight#8
mgordon2646 wants to merge 7 commits intomainfrom
Polaris_Flight

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Updating PCB of Theseus to reduce footprint and remove non-flight sensors.
Current sensors able to be read:
2x Hall sensors
3x Current (4-20mA) PTs
3x Voltage (0-5V) PTs
1x Thermocouple

2 12V solenoid actuation lines also present, plus microSD card and flash memory chip

It's still the same PCB
Still the same PCB
- Copied Ferrite Bead P/N from processor
- Added external oscillator
- Made status LED pins pull-down
- Copied processor programming header
Updated Diode and NMOS to support 1A max. Fixed valve state LED to draw from BATT instead of MCU.
First pass at flight design
Updated PT3 to use valid ADC pin
@Pdada1 Pdada1 self-requested a review February 8, 2026 23:43
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Pdada1 commented Feb 12, 2026

image @StarlightDescender if there is an ED in this section is there any reason not to priority power or to the 12V line and only draw from lipo once the ED disconnects Nit should add datasheet links for each schematic component. Makes reviewing easier image Should be 10k image any reason these need to be 10u, standard value is 0.1u image image you can flip the chip symbol along y to have gnd point down and 3v3 up. image The TC+ and TC- are flipped.

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Pdada1 commented Feb 12, 2026

image There are only 3 Batt out lines for a total 6 pts. Is the plan to only be using 3 at a time?

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Pdada1 commented Feb 12, 2026

image you have some nets which are not connected currently (gnds on chip and components and oscillator) image should gnd the T- lead image also allows detection of when thermocouple is not connected.

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Pdada1 commented Feb 13, 2026

image This trace is way to small for the main power in to the board (0.2mm only good for less than 1A) image image This is the main switching trace for the buck, it should be made as wide and short as possible to reduce the equivalent inductance of the trace. image your main loops for main power in (black) and the vout (yellow) which is gonna make it easier for noise to couple onto the buck. Aim to try to reduce the net area of the current out and returning to the chip to be more optimal. image The suggested layout from TI is a good place to start.

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2 participants