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Add initial FuseSoC support #6
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The following targets are supported so far
Linting with verilator:
$ fusesoc run --target=lint swerv
Simulation the bundled test program with modelsim or verilator
$ fusesoc run --target=sim --tool={modelsim,verilator} swerv
Run synthesis with Vivado:
$ fusesoc run --target=synth swerv
Also includes a generator for the SweRV config
Contributor
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Thank you for your feedback and proposed changes Olof. Because your PR affects RTL files, the changes will first have to pass through our review and qualification process. This may take a while. Please be patient. Thanks, |
Author
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Should I drop the first patch that changes the RTL for now and just add verilator support to begin with? |
Contributor
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We accepted this change. It will be merged into version 1.1. |
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This series fixes a syntactic issue for modelsim and adds initial FuseSoC support
How to use
pip install fusesocfusesoc library add swerv /path/to/repoto register SweRV as a libraryThe following targets are supported so far
Linting with verilator:
$ fusesoc run --target=lint swervSimulate the bundled test program with modelsim or verilator
$ fusesoc run --target=sim --tool={modelsim,verilator} swervRun synthesis with Vivado:
$ fusesoc run --target=synth swervAlso includes a generator for the SweRV config