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Refactor to use interrupt on clock pin so gate and CV always trigger#2

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Refactor to use interrupt on clock pin so gate and CV always trigger#2
erebusnz wants to merge 10 commits into
wgd-modular:mainfrom
erebusnz:main

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@erebusnz

@erebusnz erebusnz commented Oct 4, 2024

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Refactor for interrupt using clock pin
Updated to use YetAnotherPcInt for interrupt
Fixed issue with clockstate not using shiftregister
Used define instead of constants to reduce memory requirements
Updated debug serial output for gates/CV

@fxwiegand fxwiegand left a comment

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Sorry for taking so long for having a look at this. I think CV A and CV B aren't working anymore with these changes.

Comment thread apple-pie-firmware.ino
…outputs

Missing CV inputs
  - Added back in CV_1 (A0) and CV_2 (A1)

  Clock event handling (ISR refactor)
  - Replaced two separate volatile bool flags (clockLeading, clockTrailing) with a single volatile uint8_t clockEvent
  - The ISR now drives gates LOW directly via port manipulation on the falling edge, instead of setting a flag and letting loop() do a digitalWrite — this reduces falling-edge latency
  - loop() atomically reads and clears clockEvent using cli()/sei()

  LFSR improvements
  - Shift registers now start with interleaved patterns (0xAAAA / 0x5555) instead of 0x0000 — avoids the all-zero stuck state on boot so it drives new patterns faster
  - Added & 1 mask to the new-bit calculation — fixes a potential bug where more than one bit could leak into the LSB
  - random() range changed from (0, 2048) to (6, 1024) — the lower bound avoids the extreme "always-lock" edge and the upper bound matches the lock value range

  Gate output
  - Replaced digitalWrite with direct port manipulation (PORTD) for gate outputs — faster, lower latency
  - CV/DAC is now only updated when a gate fires (not every clock), so CV holds its last value on silent steps

  Sequencer control (steps/switch)
  - getShiftRegisterLength() now uses a debounce: the knob reading must be stable for 8 consecutive reads before changing — prevents glitchy length changes while turning the pot
  - Steps and switch are now only read in the else branch (between clock events), not every loop iteration
@erebusnz

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howdy, it's been over a year, but I finally got back to this. I did remove the CV inputs and have fixed that.

A few things worth calling out:

  1. Overall refactor for jitter/timing improvements with gate timing/interrupts/PORTD direct access/int-arithmetic
  2. Fixed bug with shift register making shorter patterns behave incorrectly or appear frozen/useless.
  3. CVs only updating on gate changes, sample-and-hold behavior on silent steps.
  4. Pot length input 'debounced' so it doesn't update until you finish moving the pot (i.e. go from 16 to 4 without it picking up 8 while still moving)

Please check it out!

@fxwiegand

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Thanks a lot! I will try to have a closer look soon when im at my rack. I think you added a new dependency - would you mind adding it here so the CI build works:

arduino-cli lib install "MCP48xx DAC Library"

Probably also makes sense to add a short section in the README.md about the needed libraries to compile it locally. If you find time also feel free to add it otherwise I'll try to add it after I tried the updated fw.

Again thanks so much for giving this some love and updates!

@erebusnz erebusnz left a comment

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Removed unnecessary dependency for interrupts

@erebusnz

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The dependency was totally unnecessary, a few years and some more experience with Arduino helps 😂 Hopefully it checks out on your rack!

@erebusnz erebusnz requested a review from fxwiegand March 17, 2026 10:44
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2 participants