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Use memory barriers defined by xen headers - #28

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Use memory barriers defined by xen headers#28
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xcp-ng:modern-barriers

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@ydirson

@ydirson ydirson commented Oct 30, 2025

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This gives us the necessary definitions for arm64.

Those live in xen-barrier.h starting with 4.20, but we won't be able to use it for some time. Before this they live in xenctrl.h, but it pulls too much stuff. So this is a sync with the 4.20 headers contents.

Since the code only uses mb, and no [rw]mb, the latter are not imported. The original macro name from the Xen header is preserved for easier future synchro, so this adjusts the callsites accordingly.

This gives us the necessary definitions for arm64.

Those live in xen-barrier.h starting with 4.20, but we won't be able
to use it for some time.  Before this they live in xenctrl.h, but it
pulls too much stuff.  So this is a sync with the 4.20 headers
contents.

Since the code only uses mb, and no [rw]mb, the latter are not
imported.  The original macro name from the Xen header is preserved
for easier future synchro, so this adjusts the callsites accordingly.

Signed-off-by: Yann Dirson <yann.dirson@vates.tech>
Comment thread varstored.c
* back to those provided by the kernel */
/* from <xen-barrier.h> in 4.20.0 */

#define xen_barrier() asm volatile ( "" : : : "memory")

@rosslagerwall rosslagerwall Oct 31, 2025

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Why is this added if it is not used?

Having said that, I think it might be preferable to simply include a copy of xen-barrier.h and #include it. It would be easier to keep up-to-date and mean less tat in this file.

Comment thread varstored.c
#elif defined(__arm__)
#define xen_mb() asm volatile ("dmb" : : : "memory")
#elif defined(__aarch64__)
#define xen_mb() asm volatile ("dmb sy" : : : "memory")

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This is a monster of a barrier. This orders against all observers: every core in every cluster, plus outer-shareable and non-shareable agents, GPU, other DMA masters, the interconnect fabric. This brings the entire system to a halt.

In the Linux kernel there a number of barriers defined for core coherency:

#define __smp_mb()   dmb(ish)
#define __smp_rmb()  dmb(ishld)
#define __smp_wmb()  dmb(ishst)

dmb ish (inner-shareable) is for ordering with respect to other cores in the same coherency domain, with no device/DMA involvement. This is what Linux's arm64 barrier.h defines. The dmb sy is only used when talking to MMIO or DMA devices.

Comment thread varstored.c

/* Get the correct defines for memory barriers - do not fall
* back to those provided by the kernel */
/* from <xen-barrier.h> in 4.20.0 */

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Can't we do:

#if __has_include(<xen-barrier.h>)
#include <xen-barrier.h>
#else
/* local fallback copy for pre-4.20 Xen headers */
...
#endif

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Actually I wouldn't even wait for including the xen-barrier.h header. Because after discussing with @andyhhp I would just add my own barrier code, which doesn't do dmb sy for performance.

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3 participants