Rusefi master

.gitattributes

@@ -1,2 +1,4 @@
 
 *.sh text eol=lf
+# SCM syntax highlighting & preventing 3-way merges
+pixi.lock merge=binary linguist-language=YAML linguist-generated=true -diff

.github/workflows/build-firmware.yaml

@@ -12,39 +12,39 @@ jobs:
       matrix:
         include:
           - build-target: f0_module
-          # - build-target: f1_rev2
-          # - build-target: f1_rev3
-          # - build-target: f1_dual
-          # - build-target: f1_dual_rev1
+          - build-target: f1_rev2
+          - build-target: f1_rev3
+          - build-target: f1_dual
+          - build-target: f1_dual_rev1
 
     steps:
       - uses: actions/checkout@v1
         with:
           submodules: recursive
 
-      # Build machines don't have arm-none-eabi gcc, so let's download it and put it on the path
-      - name: Download & Install GCC
-        env:
-          ACTIONS_ALLOW_UNSECURE_COMMANDS: 'true'
-        run: | # Compiler hosted on our other git repo - avoids having to download from the nice folks at ARM every time
-          wget 'https://github.com/rusefi/build_support/raw/master/arm-gnu-toolchain-11.3.rel1-x86_64-arm-none-eabi.tar.xz' -O compiler.tar.xz
-          tar -xvf compiler.tar.xz
-          echo "::add-path::`pwd`/arm-gnu-toolchain-11.3.rel1-x86_64-arm-none-eabi/bin"
-
-      # Make sure the compiler we just downloaded works - just print out the version
-      - name: Test Compiler
-        run: arm-none-eabi-gcc -v
+      - uses: prefix-dev/setup-pixi@v0.9.4
+        with:
+          pixi-version: v0.63.2
+          cache: true
 
       - name: Install build tools
         run: |
           sudo apt-get install srecord libarchive-zip-perl
 
       - name: Build Firmware
-        working-directory: ./firmware/boards/${{matrix.build-target}}
-        run: ./build_wideband.sh
+        run: pixi run build ${{matrix.build-target}}
 
       - name: Attach binaries
         uses: actions/upload-artifact@v4
         with:
           name: Wideband ${{matrix.build-target}}
           path: ./firmware/deliver/${{matrix.build-target}}/wideband*
+
+      - name: Zip artifacts
+        run: zip Wideband\ ${{matrix.build-target}}.zip ./firmware/deliver/${{matrix.build-target}}/wideband*
+
+      - name: Make a new Release
+        uses: softprops/action-gh-release@v2
+        if: startsWith(github.ref, 'refs/tags/')
+        with:
+          files: Wideband\ ${{matrix.build-target}}.zip

.gitignore

@@ -65,3 +65,6 @@ build/
 
 # cortex-debug vscode extension local state
 .vscode/.cortex-debug*state.json
+# pixi environments
+.pixi/*
+!.pixi/config.toml

.gitmodules

@@ -10,7 +10,7 @@
 	url = https://github.com/rusefi/kicad-libraries
 [submodule "firmware/ext/openblt"]
 	path = firmware/ext/openblt
-	url = https://github.com/rusefi/openblt
+	url = https://github.com/dron0gus/openblt
 [submodule "firmware/libfirmware"]
 	path = firmware/libfirmware
 	url = https://github.com/rusefi/libfirmware.git

.vscode/c_cpp_properties.json

@@ -0,0 +1,133 @@
+{
+    "configurations": [
+        {
+            "name": "F0 Module (default)",
+            "includePath": [
+                "${workspaceFolder}/firmware/boards/f0_module",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/include",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/templates/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/LLD/ADCv1",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/STM32F0xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/ext/ST/STM32F0xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/startup/ARMCMx/devices/STM32F0xx",
+                "${workspaceFolder}/firmware/**"
+            ],
+            "forcedInclude": [
+                "${workspaceFolder}/firmware/boards/f0_module/board.h"
+            ],
+            "defines": [
+                "STM32F042x6",
+                "WB_PROD=1",
+                "USE_BOOTLOADER=1",
+                "_DEBUG"
+            ],
+            "compilerPath": "${workspaceFolder}/.pixi/envs/default/bin/arm-none-eabi-gcc",
+            "cStandard": "gnu11",
+            "cppStandard": "c++20",
+            "intelliSenseMode": "gcc-arm"
+        },
+        {
+            "name": "F1 Dual",
+            "includePath": [
+                "${workspaceFolder}/firmware/boards/f1_dual",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/include",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/templates/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/ext/ST/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/startup/ARMCMx/devices/STM32F1xx",
+                "${workspaceFolder}/firmware/**"
+            ],
+            "forcedInclude": [
+                "${workspaceFolder}/firmware/boards/f1_dual/board.h"
+            ],
+            "defines": [
+                "WB_PROD=1",
+                "TS_ENABLED=TRUE",
+                "_DEBUG"
+            ],
+            "compilerPath": "${workspaceFolder}/.pixi/envs/default/bin/arm-none-eabi-gcc",
+            "cStandard": "gnu11",
+            "cppStandard": "c++20",
+            "intelliSenseMode": "gcc-arm"
+        },
+        {
+            "name": "F1 Dual Rev1",
+            "includePath": [
+                "${workspaceFolder}/firmware/boards/f1_dual_rev1",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/include",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/templates/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/ext/ST/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/startup/ARMCMx/devices/STM32F1xx",
+                "${workspaceFolder}/firmware/**"
+            ],
+            "forcedInclude": [
+                "${workspaceFolder}/firmware/boards/f1_dual_rev1/board.h",
+                "${workspaceFolder}/firmware/boards/f1_dual_rev1/io/io_pins.h"
+            ],
+            "defines": [
+                "WB_PROD=1",
+                "TS_ENABLED=TRUE",
+                "_DEBUG"
+            ],
+            "compilerPath": "${workspaceFolder}/.pixi/envs/default/bin/arm-none-eabi-gcc",
+            "cStandard": "gnu11",
+            "cppStandard": "c++20",
+            "intelliSenseMode": "gcc-arm"
+        },
+        {
+            "name": "F1 Rev2",
+            "includePath": [
+                "${workspaceFolder}/firmware/boards/f1_rev2",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/include",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/templates/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/ext/ST/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/startup/ARMCMx/devices/STM32F1xx",
+                "${workspaceFolder}/firmware/**"
+            ],
+            "forcedInclude": [
+                "${workspaceFolder}/firmware/boards/f1_rev2/board.h"
+            ],
+            "defines": [
+                "WB_PROD=1",
+                "TS_ENABLED=TRUE",
+                "_DEBUG"
+            ],
+            "compilerPath": "${workspaceFolder}/.pixi/envs/default/bin/arm-none-eabi-gcc",
+            "cStandard": "gnu11",
+            "cppStandard": "c++20",
+            "intelliSenseMode": "gcc-arm"
+        },
+        {
+            "name": "F1 Rev3",
+            "includePath": [
+                "${workspaceFolder}/firmware/boards/f1_rev3",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/include",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/templates/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/**",
+                "${workspaceFolder}/firmware/ChibiOS/os/hal/ports/STM32/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/ext/ST/STM32F1xx",
+                "${workspaceFolder}/firmware/ChibiOS/os/common/startup/ARMCMx/devices/STM32F1xx",
+                "${workspaceFolder}/firmware/**"
+            ],
+            "forcedInclude": [
+                "${workspaceFolder}/firmware/boards/f1_rev3/board.h"
+            ],
+            "defines": [
+                "WB_PROD=1",
+                "TS_ENABLED=TRUE",
+                "_DEBUG"
+            ],
+            "compilerPath": "${workspaceFolder}/.pixi/envs/default/bin/arm-none-eabi-gcc",
+            "cStandard": "gnu11",
+            "cppStandard": "c++20",
+            "intelliSenseMode": "gcc-arm"
+        }
+    ],
+    "version": 4
+}

README.md

@@ -1,3 +1,25 @@
+# Wideband
+
+This fork is for development of FW for [RusEFI](https://github.com/rusefi) [dual channel wideband](https://github.com/rusefi/rusefi-hardware/tree/main/lambda-x2). Based on [original design](https://github.com/mck1117/wideband) from [mck1117](https://github.com/mck1117)
+
+For stm32f042 FW please refer to original repo. While I try to keep it buildable and unaffected by my modification I can not guaranty its functionality and provide any support.
+
+# Initial flashing
+
+For initial flashing of newly assembled device under Windows please refer to [this instruction](https://rusefi.com/forum/viewtopic.php?p=48379#p48379).
+
+I hope Linux users are experience enough to know how to use [stm32flash tool](https://github.com/ARMinARM/stm32flash). There are two sample scripts to [flash OpenBLT only](/firmware/dfu_flash_openblt.sh) and [flash combined image of OpenBLT + main FW](/firmware/dfu_flash.sh).
+
+# Update using OpenBLT
+
+[OpenBLT](https://github.com/feaser/openblt) bootloader is used for FW update functionality. Please reffer to original [documentation](https://www.feaser.com/openblt/doku.php?id=faq) on how to compile host tools and use it.
+
+There are few sample linux scripts for updating device over [CAN](/firmware/flash_can.sh) or [UART](/firmware/flash_uart.sh).
+
+Linux users can use almost any USB to CAN adapter supported by linux and providing SocketCAN interface ([for example](https://rusefi.com/forum/viewtopic.php?f=13&t=2209)). Windows users please check OpenBLT documentation.
+
+# Original readme
+
 [![Build Firmware](https://github.com/mck1117/wideband/actions/workflows/build-firmware.yaml/badge.svg)](https://github.com/mck1117/wideband/actions/workflows/build-firmware.yaml) ![license](https://img.shields.io/github/license/mck1117/wideband)
 
 # rusEFI Wideband Controller

firmware/Makefile

@@ -23,7 +23,7 @@ endif
 
 # C++ specific options here (added to USE_OPT).
 ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti -fno-exceptions -ffast-math -funsafe-math-optimizations -fno-threadsafe-statics -fno-use-cxa-atexit -std=c++17
+  USE_CPPOPT = -fno-rtti -fno-exceptions -ffast-math -funsafe-math-optimizations -fno-threadsafe-statics -fno-use-cxa-atexit -std=c++20
 endif
 
 # Enable this if you want the linker to remove unused code and data.
@@ -136,7 +136,9 @@ LDSCRIPT=app.ld
 
 # C sources that can be compiled in ARM or THUMB mode depending on the global
 # setting.
-CSRC = $(ALLCSRC) $(BOARDDIR)/board.c
+CSRC = $(ALLCSRC) \
+        $(BOARDDIR)/board.c \
+        boards/f1_common/openblt/shared_params.c
 
 # C++ sources that can be compiled in ARM or THUMB mode depending on the global
 # setting.
@@ -148,7 +150,8 @@ CPPSRC = $(ALLCPPSRC) \
           shared/flash.cpp \
           can.cpp \
           can_helper.cpp \
-          fault.cpp \
+          can_aemnet.cpp \
+          status.cpp \
           lambda_conversion.cpp \
           pwm.cpp \
           dac.cpp \
@@ -187,7 +190,8 @@ INCDIR = $(CONFDIR) \
          console/binary/ \
          boards/ \
          shared/ \
-         $(BOARDDIR)/io/
+         $(BOARDDIR)/io/ \
+         boards/f1_common/openblt
 
 # Define C warning options here.
 CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
@@ -236,9 +240,6 @@ ifeq ($(USE_OPENBLT),yes)
   # Reserve start of flash for OpenBLT
   USE_OPT += -Wl,--defsym=USE_BOOTLOADER=1
   DDEFS += -DUSE_OPENBLT=TRUE
-  # Shared params
-  INCDIR += boards/f1_common/openblt
-  CSRC += boards/f1_common/openblt/shared_params.c
 endif
 
 #

firmware/boards/build_f1_board.sh

@@ -30,11 +30,19 @@ mkdir -p ${DELIVER_DIR}
 rm -f ${DELIVER_DIR}/*
 
 if uname | grep "NT"; then
-  HEX2DFU=./ext/encedo_hex2dfu/hex2dfu.exe
+  if command -v hex2dfu.exe >/dev/null 2>&1; then
+    HEX2DFU=hex2dfu.exe
+  else
+    HEX2DFU=./ext/encedo_hex2dfu/hex2dfu.exe
+  fi
   SREC_CAT=srec_cat.exe
 else
-  HEX2DFU=./ext/encedo_hex2dfu/hex2dfu.bin
-  chmod u+x $HEX2DFU
+  if command -v hex2dfu >/dev/null 2>&1; then
+    HEX2DFU=hex2dfu
+  else
+    HEX2DFU=./ext/encedo_hex2dfu/hex2dfu.bin
+    chmod u+x $HEX2DFU
+  fi
   SREC_CAT=srec_cat
 fi
 

firmware/boards/f0_module/board.h

@@ -165,10 +165,12 @@
  * GPIOA setup:
  *
  * PA0  - Un_sense                  (analog in).
- * PA1  - Vm_sense                  (analog in).
+ * PA1  - LSU_vm                    (analog in).
  * PA2  - Ip_sense                  (analog in).
+ * PA3  - Vm_sense                  (analog in).
  * PA6  - Ip_dac (PWM)              (output pushpull, alternate 1).
  * PA7  - Heater PWM                (output pushpull, alternate 2).
+ * PA8  - SEL2                      (digital input)
  * PA9  - UART TX                   (alternate 1).
  * PA10 - UART RX                   (alternate 1).
  * PA11 - CAN RX                    (alternate 4).
@@ -179,19 +181,19 @@
  */
 #define VAL_GPIOA_MODER             (PIN_MODE_ANALOG(GPIOA_PIN0) |         \
                                      PIN_MODE_ANALOG(GPIOA_PIN1) |         \
-                                     PIN_MODE_ANALOG(GPIOA_PIN2) |     \
-                                     PIN_MODE_INPUT(GPIOA_PIN3) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN4) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN5) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN6) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN7) |         \
-                                     PIN_MODE_INPUT(GPIOA_PIN8) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN9) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN10) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN11) |        \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN12) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
+                                     PIN_MODE_ANALOG(GPIOA_PIN2) |         \
+                                     PIN_MODE_ANALOG(GPIOA_PIN3) |         \
+                                     PIN_MODE_INPUT(GPIOA_PIN4) |          \
+                                     PIN_MODE_INPUT(GPIOA_PIN5) |          \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN6) |      \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN7) |      \
+                                     PIN_MODE_INPUT(GPIOA_PIN8) |          \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN9) |      \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN10) |     \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN11) |     \
+                                     PIN_MODE_ALTERNATE(GPIOA_PIN12) |     \
+                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |     \
+                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |     \
                                      PIN_MODE_ALTERNATE(GPIOA_PIN15))
 #define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) |     \
                                      PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |     \

firmware/boards/f0_module/bootloader/Makefile

@@ -17,7 +17,7 @@ endif
 
 # C++ specific options here (added to USE_OPT).
 ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti -fno-exceptions -ffast-math -funsafe-math-optimizations -fno-threadsafe-statics -fno-use-cxa-atexit -std=c++17
+  USE_CPPOPT = -fno-rtti -fno-exceptions -ffast-math -funsafe-math-optimizations -fno-threadsafe-statics -fno-use-cxa-atexit -std=c++20
 endif
 
 # Enable this if you want the linker to remove unused code and data.