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Add changes for TF-M v2.3#7

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valeriosetti wants to merge 26 commits intozephyrproject-rtos:mainfrom
valeriosetti:tfm-bump-2.3
Draft

Add changes for TF-M v2.3#7
valeriosetti wants to merge 26 commits intozephyrproject-rtos:mainfrom
valeriosetti:tfm-bump-2.3

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  • Update to v2.4.0
  • Add TF-M's extra patch

KeilChris and others added 22 commits December 4, 2024 17:39
Removes error:
error: old-style function definition [-Werror=old-style-definition]
Bit shift in accordance with IRQn % 16 was incorrect, and masking was
needed to extract only the IRQn bits. Both fixed.
)

Need to be tested /reviewed, as I am not sure about the flag control
logic.
Fix documentation of the Register HPPIR_INTID according to
"ARM Generic Interrupt Controller Architecture version 2.0 Architecture
Specification"
Table 4-41 GICC_HPPIR bit assignments


![409053189-dfa13d3e-1650-489b-a8f2-b061ac9afe17](https://github.com/user-attachments/assets/919edcce-ce77-450b-8839-af6555f2249a)
Inline assembler constraints were incorrect

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
Inline assembler constraints were incorrect.

Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
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github-actions Bot commented Apr 27, 2026

Test Results

   264 files   -   108     264 suites   - 108   0s ⏱️ - 8m 15s
    56 tests +    7      54 ✅ + 41      2 💤  -     3  0 ❌  -  31 
14 292 runs   - 3 936  12 124 ✅ +784  2 168 💤  - 4 096  0 ❌  - 624 

Results for commit 0149af2. ± Comparison against base commit 30a859f.

This pull request removes 49 and adds 56 tests. Note that renamed tests count towards both.
CMSIS-Core.src ‑ apsr.c
CMSIS-Core.src ‑ basepri.c
CMSIS-Core.src ‑ bkpt.c
CMSIS-Core.src ‑ clrex.c
CMSIS-Core.src ‑ clz.c
CMSIS-Core.src ‑ control.c
CMSIS-Core.src ‑ cp15.c
CMSIS-Core.src ‑ cpsr.c
CMSIS-Core.src ‑ dmb.c
CMSIS-Core.src ‑ dsb.c
…
TC_CML1Cache_CleanDCacheByAddrWhileDisabled
TC_CML1Cache_EnDisableDCache
TC_CML1Cache_EnDisableICache
TC_CoreFunc_APSR
TC_CoreFunc_BASEPRI
TC_CoreFunc_Control
TC_CoreFunc_EnDisIRQ
TC_CoreFunc_EncDecIRQPrio
TC_CoreFunc_FAULTMASK
TC_CoreFunc_FPSCR
…
This pull request removes 5 skipped tests and adds 2 skipped tests. Note that renamed tests count towards both.
CMSIS-Core.src ‑ lda.c
CMSIS-Core.src ‑ ldaex.c
CMSIS-Core.src ‑ stl.c
CMSIS-Core.src ‑ stlex.c
CMSIS-Core.src ‑ systick.c
TC_CoreInstr_WFE
TC_CoreInstr_WFI

♻️ This comment has been updated with latest results.

…-software#246)

Use picolibc's _start function instead of providing our own.

Signed-off-by: Keith Packard <keithp@keithp.com>
(cherry picked from commit e902f86)
@valeriosetti valeriosetti force-pushed the tfm-bump-2.3 branch 2 times, most recently from 0149af2 to 725ec47 Compare April 27, 2026 11:07
david-hazi-arm and others added 3 commits April 29, 2026 11:29
Added missing Coprocessor Power Control Register Definitions to the
v8m-mainline cpus.

Signed-off-by: Dávid Házi <david.hazi@arm.com>
Add "zephyr/module.yml" so that Zephyr's build system will use this as a
module.
Remaining integration is done the same way as for CMSIS_5.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Implements add_subdirectory_ifdef function needed
to build with TF-M.

Signed-off-by: Flavio Ceolin <flavio.ceolin@gmail.com>
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Hi @valeriosetti, we don't have any Zephyr specific changes in this module. Could you please try upstreaming this changes instead?

@valeriosetti
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Hi @valeriosetti, we don't have any Zephyr specific changes in this module. Could you please try upstreaming this changes instead?

Sure, that's fine by me, but before trying to upstream anything I would like to have a green CI on the integrating PR. This is the reason why this is still drafted ;)

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