modules: hal: mchp sam: Add SAMA5D2 and SAM9X7 header files

packs/sam/CMakeLists.txt

@@ -5,5 +5,7 @@
 
 add_subdirectory_ifdef(CONFIG_SOC_FAMILY_MICROCHIP_SAM_D5X_E5X	sam_d5x_e5x)
 
+add_subdirectory_ifdef(CONFIG_SOC_SERIES_SAM9X7 sam9x7)
+add_subdirectory_ifdef(CONFIG_SOC_SERIES_SAMA5D2 sama5d2)
 add_subdirectory_ifdef(CONFIG_SOC_SERIES_SAMA7D6 sama7d6)
 add_subdirectory_ifdef(CONFIG_SOC_SERIES_SAMA7G5 sama7g5)

packs/sam/sam9x7/CMakeLists.txt

@@ -0,0 +1,6 @@
+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+zephyr_include_directories(include)

packs/sam/sam9x7/include/component-version.h

@@ -0,0 +1,56 @@
+/*
+ * Component version header file
+ *
+ * Copyright (c) 2025 Microchip Technology Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+
+#ifndef _COMPONENT_VERSION_H_INCLUDED
+#define _COMPONENT_VERSION_H_INCLUDED
+
+#define COMPONENT_VERSION_MAJOR 1
+#define COMPONENT_VERSION_MINOR 9
+
+//
+// The COMPONENT_VERSION define is composed of the major and the minor version number.
+//
+// The last four digits of the COMPONENT_VERSION is the minor version with leading zeros.
+// The rest of the COMPONENT_VERSION is the major version.
+//
+#define COMPONENT_VERSION 10009
+
+//
+// The build number does not refer to the component, but to the build number
+// of the device pack that provides the component.
+//
+#define BUILD_NUMBER 170
+
+//
+// The COMPONENT_VERSION_STRING is a string (enclosed in ") that can be used for logging or embedding.
+//
+#define COMPONENT_VERSION_STRING "1.9"
+
+//
+// The COMPONENT_DATE_STRING contains a timestamp of when the pack was generated.
+//
+// The COMPONENT_DATE_STRING is written out using the following strftime pattern.
+//
+//     "%Y-%m-%d %H:%M:%S"
+//
+//
+#define COMPONENT_DATE_STRING "2025-02-21 13:28:56"
+
+#endif/* #ifndef _COMPONENT_VERSION_H_INCLUDED */
+

packs/sam/sam9x7/include/component/bsc.h

@@ -0,0 +1,54 @@
+/*
+ * Component description for BSC
+ *
+ * Copyright (c) 2025 Microchip Technology Inc. and its subsidiaries.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ */
+
+/*  file generated from device description file (ATDF) version 2024-06-25T17:22:56Z  */
+#ifndef _SAM9X7_BSC_COMPONENT_H_
+#define _SAM9X7_BSC_COMPONENT_H_
+
+/* ************************************************************************** */
+/*                      SOFTWARE API DEFINITION FOR BSC                       */
+/* ************************************************************************** */
+
+/* -------- BSC_CR : (BSC Offset: 0x00) (R/W 32) Boot Sequence Controller Configuration Register -------- */
+#define BSC_CR_BOOT_Pos                       _UINT32_(0)                                          /* (BSC_CR) Boot Media Sequence Position */
+#define BSC_CR_BOOT_Msk                       (_UINT32_(0x7) << BSC_CR_BOOT_Pos)                   /* (BSC_CR) Boot Media Sequence Mask */
+#define BSC_CR_BOOT(value)                    (BSC_CR_BOOT_Msk & (_UINT32_(value) << BSC_CR_BOOT_Pos)) /* Assignment of value for BOOT in the BSC_CR register */
+#define BSC_CR_WPKEY_Pos                      _UINT32_(16)                                         /* (BSC_CR) Write Protection Key (Write-only) Position */
+#define BSC_CR_WPKEY_Msk                      (_UINT32_(0xFFFF) << BSC_CR_WPKEY_Pos)               /* (BSC_CR) Write Protection Key (Write-only) Mask */
+#define BSC_CR_WPKEY(value)                   (BSC_CR_WPKEY_Msk & (_UINT32_(value) << BSC_CR_WPKEY_Pos)) /* Assignment of value for WPKEY in the BSC_CR register */
+#define   BSC_CR_WPKEY_PASSWD_Val             _UINT32_(0x6683)                                     /* (BSC_CR) Writing any other value in this field aborts the write operation of the BOOT field. Always reads as 0.  */
+#define BSC_CR_WPKEY_PASSWD                   (BSC_CR_WPKEY_PASSWD_Val << BSC_CR_WPKEY_Pos)        /* (BSC_CR) Writing any other value in this field aborts the write operation of the BOOT field. Always reads as 0. Position */
+#define BSC_CR_Msk                            _UINT32_(0xFFFF0007)                                 /* (BSC_CR) Register Mask  */
+
+
+/* BSC register offsets definitions */
+#define BSC_CR_REG_OFST                _UINT32_(0x00)      /* (BSC_CR) Boot Sequence Controller Configuration Register Offset */
+
+#if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
+/* BSC register API structure */
+typedef struct
+{  /* Boot Sequence Controller */
+  __IO  uint32_t                       BSC_CR;             /* Offset: 0x00 (R/W  32) Boot Sequence Controller Configuration Register */
+} bsc_registers_t;
+
+
+#endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
+#endif /* _SAM9X7_BSC_COMPONENT_H_ */