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#74534 added support for Microchip QSPI NOR flash ICs to the STM32 QSPI driver. There were two changes needed:

  • A Microchip-specific special case, through a Kconfig option, to use the PP_1_1_4 opcode in PP_1_4_4 mode
  • A devicetree property and driver support for sending the Unlock Block Protection Register command before attempting to write

These were added to the QSPI driver but not to the OSPI or XSPI drivers which also support QSPI ICs. This PR ports both changes to the OSPI and XSPI drivers.

Commits 72370b2 and ff34d57 added the requires-ulbpr
(Unlock Block Protection Register) property to the devicetree binding
for devices controlled by the STM32 QSPI peripheral, and support for
this property to the STM32 QSPI driver.
Some QSPI flash ICs (e.g. Microchip SST26VF series) require this
command to be sent before writing/erasing is possible.

This commit adds the same support to the STM32 OSPI and XSPI drivers.

Signed-off-by: Ben Marsh <[email protected]>
Commit 76740ae added a special case to the STM32 QSPI driver to support
Microchip QSPI flash ICs, such as the SST26VF series,
which use the PP_1_1_4 opcode in PP_1_4_4 mode.

This commit adds the same special case to the STM32 OSPI and XSPI drivers.

Signed-off-by: Ben Marsh <[email protected]>
@besmarsh besmarsh force-pushed the add-support-for-microchip-qspi-to-stm32-oxspi-drivers branch from 2d250bb to 25170b0 Compare October 14, 2025 07:45
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3 participants