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boards: st: stm32u83c_dk: Add USB support #97486

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dts: arm: st: stm32u0: Move HSI48 to USB capable families
ABESTM Oct 13, 2025
39e305e
boards: st: stm32u83c_dk: Add USB support
ABESTM Oct 13, 2025
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13 changes: 13 additions & 0 deletions boards/st/stm32u083c_dk/stm32u083c_dk.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -175,3 +175,16 @@ stm32_lp_tick_source: &lptim2 {
};
};
};

zephyr_udc0: &usb {
clocks = <&rcc STM32_CLOCK(APB1, 13)>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(3)>;
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Probably should be described as a st,stm32-clock-mux like done on STM32F4 (see stm32f412.dtsi).

See also: #96353

pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};

&clk_hsi48 {
status = "okay";
crs-usb-sof;
};
7 changes: 0 additions & 7 deletions dts/arm/st/u0/stm32u0.dtsi
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Expand Up @@ -77,13 +77,6 @@
status = "disabled";
};

clk_hsi48: clk-hsi48 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(48)>;
status = "disabled";
};

clk_msi: clk-msi {
#clock-cells = <0>;
compatible = "st,stm32-msi-clock";
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9 changes: 9 additions & 0 deletions dts/arm/st/u0/stm32u073.dtsi
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Expand Up @@ -62,6 +62,15 @@
};
};

clocks {
clk_hsi48: clk-hsi48 {
#clock-cells = <0>;
compatible = "st,stm32-hsi48-clock";
clock-frequency = <DT_FREQ_M(48)>;
status = "disabled";
};
};

sram1: memory@20000000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "SRAM1";
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