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Introduce the DT_MEM_RISCV_TO_PMP_PERM macro to translate Device Tree RISC-V memory attributes (DT_MEM_RISCV_TYPE_IO_R, DT_MEM_RISCV_TYPE_IO_W, DT_MEM_RISCV_TYPE_IO_X) into their corresponding RISC-V PMP permission bits (PMP_R, PMP_W, PMP_X).

This allows for a clear and standardized way to define PMP regions based on Device Tree properties.

Added a test suite for RISC-V PMP utilities, including a test case to verify the correctness of the DT_MEM_RISCV_TO_PMP_PERM macro across various attribute combinations.

@zephyrbot zephyrbot added area: Tests Issues related to a particular existing or missing test area: RISCV RISCV Architecture (32-bit & 64-bit) labels Oct 13, 2025
Introduce the DT_MEM_RISCV_TO_PMP_PERM macro to translate Device Tree
RISC-V memory attributes (DT_MEM_RISCV_TYPE_IO_R, DT_MEM_RISCV_TYPE_IO_W,
DT_MEM_RISCV_TYPE_IO_X) into their corresponding RISC-V PMP permission
bits (PMP_R, PMP_W, PMP_X).

This allows for a clear and standardized way to define PMP regions
based on Device Tree properties.

Added a test suite for RISC-V PMP utilities, including a test case
to verify the correctness of the DT_MEM_RISCV_TO_PMP_PERM macro
across various attribute combinations.

Signed-off-by: Firas Sammoura <[email protected]>
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Comment on lines +12 to +16
#define DT_MEM_RISCV_TO_PMP_PERM(dt_attr) ( \
(((dt_attr) & DT_MEM_RISCV_TYPE_IO_R) ? PMP_R : 0) | \
(((dt_attr) & DT_MEM_RISCV_TYPE_IO_W) ? PMP_W : 0) | \
(((dt_attr) & DT_MEM_RISCV_TYPE_IO_X) ? PMP_X : 0))

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This macro seems to be internal to PMP driver in #96241 (not for application) and is part of the CONFIG_MEM_ATTR with PMP.

Would you mind to integrate test_dt_pmp_perm_conversion into #96241, under tests/arch/riscv/pmp/mem-attr-entries/src/main.c? Thanks.

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ok. I added it into #96241

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6 participants