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53 changes: 53 additions & 0 deletions examples/protocols/arinc818/ARINC818-main.stanza
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#use-added-syntax(jitx)
defpackage jsl/examples/protocols/arinc818/ARINC818-main:
import core
import collections
import jitx
import jitx/commands


import jsl/design/settings

import jsl/protocols/arinc818
import jsl/si/helpers

import jsl/examples/protocols/common/example-board
import jsl/examples/protocols/common/example-components
import jsl/examples/protocols/arinc818/ARINC818-src


pcb-module ARINC818-example :
pin GND

inst dut1 : jsl/examples/protocols/arinc818/ARINC818-src/module(invert = false)
inst dut2 : jsl/examples/protocols/arinc818/ARINC818-src/module(invert = true)
inst conn1 : jsl/examples/protocols/arinc818/ARINC818-src/arinc-connector
require src1t : ARINC818(TX) from dut1
require src1r : ARINC818(RX) from dut1
require src2r : ARINC818(RX) from dut2
require src2t : ARINC818(TX) from dut2
require src1tc : ARINC818(TX) from dut1
require src1rc : ARINC818(RX) from dut1

val ti-arinc = ARINC818-get-trace-impedance()
val ARINC818-constraints = ARINC818-Constraint(version = ARINC818-FC12x route-struct = diff(ti-arinc))

connect-ARINC818(ARINC818-constraints, src1t, src2r)
connect-ARINC818(ARINC818-constraints, src2t, src1r)
connect-ARINC818(ARINC818-constraints, src1tc, conn1.arinc818-rx)
connect-ARINC818(ARINC818-constraints, conn1.arinc818-tx, src1rc)

net (GND conn1.GND)

set-current-design("ARINC818-example")
setup-board()
; Set the schematic sheet size
set-paper(ANSI-B)

; Set the top level module (the module to be compile into a schematic and PCB)
set-main-module(ARINC818-example)

; View the results
view-design-explorer()
view-schematic()
view-board()
135 changes: 135 additions & 0 deletions examples/protocols/arinc818/ARINC818-src.stanza
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#use-added-syntax(jitx)
defpackage jsl/examples/protocols/arinc818/ARINC818-src :
import core
import jitx
import jitx/commands
import math

import jsl/symbols/SymbolDefn
import jsl/symbols/box-symbol
import jsl/landpatterns/packages
import jsl/landpatterns/QFN
import jsl/landpatterns/leads
import jsl/landpatterns/pads
import jsl/landpatterns/pad-planner
import jsl/landpatterns/helpers

import jsl/design/settings
import jsl/si/helpers
import jsl/pin-assignment
import jsl/bundles
import jsl/protocols/arinc818

doc: \<DOC>
@brief ARINC818 dummy component
The component defined in this file is an example of how to enable a ARINC818 interface
on a component. The component demonstrates the use of JSL land-patterns and symbols.
<DOC>

val pkg = QFN(
num-leads = 32,
lead-profile = QFN-Lead-Profile(
span = 5.0 +/- 0.05,
pitch = 0.5,
lead-length = 0.4 +/- 0.05,
lead-width = 0.25 +/- 0.05
),
thermal-lead? = Rectangle(3.7, 3.7),
package-body = PackageBody(
width = 5.0 +/- 0.05,
length = 5.0 +/- 0.05,
height = 0.8 +/- 0.05
),
pad-planner = Corner-PadPlanner(
chamfered-corner-shaper(0.15),
rect-shaper,
8
)
density-level = DensityLevelA
)


doc: \<DOC>
@brief ARINC818 dummy component definition
This definition assumes a QFN component with pins defined per the ARINC818 standard.
<DOC>

public pcb-component component :
reference-prefix = "U"
mpn = "JITX004"
description = "Dummy device with one ARINC818 port"

pin-properties :
[pin:Ref | pads:Ref ... ]
for i in 1 through 32 do :
[ A[i] | p[i] ]

assign-landpattern(create-landpattern(pkg))
val box = BoxSymbol(self)

for i in 1 through 32 do :
if i % 2 == 0:
set-side(Right, self.A[i])
else :
set-side(Left, self.A[i])
assign-symbol(create-symbol(box))

for i in 0 to 16 do :
supports diff-pair :
diff-pair.P => self.A[i * 2 + 1]
diff-pair.N => self.A[i * 2 + 2]


public pcb-module module (-- invert:True|False = false):

public inst ctrl : component

val NUM-IO = 32
val num-options = 16
for ver in [TX RX] do : ; iterate over TX and then RX
for i in 0 to num-options do :
val arinc = ARINC818(ver)
supports arinc :
require dp: diff-pair from ctrl
switch(ver) :
TX :
if invert :
arinc.TX.P => dp.N
arinc.TX.N => dp.P
else :
arinc.TX.P => dp.P
arinc.TX.N => dp.N
RX :
if invert :
arinc.RX.P => dp.N
arinc.RX.N => dp.P
else :
arinc.RX.P => dp.P
arinc.RX.N => dp.N

pcb-landpattern arinc-lp :
for i in 1 through 7 :
pad p[i] : smd-pad(0.80, 2.40) at loc(-1.27 * to-double(i - 1), 0.0) on Top

pad p[8] : pth-pad(1.35) at loc(2.46, -1.0)
pad p[9] : pth-pad(1.35) at loc(-6.0 * 1.27 - 2.46, 0.00)
layer(Courtyard(Top)) = Rectangle(16.83, 6.45, loc(-3.0 * 1.27, -1.29 / 2.0))


public pcb-component arinc-connector :
port arinc818-tx : ARINC818(TX)
port arinc818-rx : ARINC818(RX)
port GND : pin

pin-properties :
[ pin : Ref | pads : Int ... ]
[ GND | 1 4 7 8 9 ]
[ arinc818-tx.TX.P | 2 ]
[ arinc818-tx.TX.N | 3 ]
[ arinc818-rx.RX.N | 5 ]
[ arinc818-rx.RX.P | 6 ]

assign-landpattern(arinc-lp)
val box = BoxSymbol(self)
assign-symbol(create-symbol(box))

1 change: 1 addition & 0 deletions src/protocols.stanza
Original file line number Diff line number Diff line change
Expand Up @@ -13,5 +13,6 @@ defpackage jsl/protocols:
forward jsl/protocols/ethernet/MII/RGMII
forward jsl/protocols/ethernet/MII/RMII
forward jsl/protocols/sata
forward jsl/protocols/arinc818


160 changes: 160 additions & 0 deletions src/protocols/arinc818.stanza
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doc: \<DOC>
@brief ARINC-818 Protocol

ARINC-818 is a serial high speed protocol supporting video links in avionics applications.
Also known as Avionics Digital Video Bus over Fibre Channel.
@see https://en.wikipedia.org/wiki/ARINC_818

This functions and definitions in this file support defining ARINC818
connections between sources and receivers on a printed circuit board.
@see https://docs.wixstatic.com/ugd/aefb08_37d298772ed9485f97af8f2954270e38.pdf?index=true
<DOC>
#use-added-syntax(jitx)
defpackage jsl/protocols/arinc818:
import core
import jitx
import jitx/commands

import jsl/errors
import jsl/bundles
import jsl/pin-assignment
import jsl/si/helpers
import jsl/si/pairs
import jsl/si/constraints

doc: \<DOC>
@brief ARINC Type
This enumerated type defines either a TX type or RX type for the ARINC818 bundle.
<DOC>
public pcb-enum jsl/protocols/arinc818/ARINC818Type :
TX
RX

doc: \<DOC>
@brief ARINC Generation enums
This is a fixed list of possible generation definitions for ARINC818
<DOC>

public pcb-enum jsl/protocols/arinc818/ARINC818Version:
ARINC818-FC1x ; 1.0625 Gbits/s
ARINC818-1p5 ; 1.5 Gbits/s
ARINC818-1p62 ; 1.62 Gbits/s
ARNIC818-FC2x ; 2.125 Gbits/s
ARINC818-2p5 ; 2.5 Gbits/s
ARINC818-3p1875 ; 3.1875 Gbits/s
ARNIC818-FC4x ; 4.5 Gbits/s
ARINC818-5p0 ; 5.0 Gbits/s
ARINC818-FC6x ; 6.375 Gbits/s
ARINC818-FC8x ; 8.5 Gbits/s
ARINC818-FC12x ; 12.75 Gbits/s
ARINC818-FC16x ; 14.025 Gbits/s
ARINC818-FC24x ; 21.0375 Gbits/s
ARINC818-FC32x ; 28.05 Gbits/s



doc: \<DOC>
@brief ARINC818 Bundle
The Data Bundle consists of 1 differential pair (1 RX or TX)
@member TX/RX for the ARINC818 bundle (consists of either a TX or RX diff pair)
<DOC>

public pcb-bundle ARINC818 (type:ARINC818Type) :
name = "ARINC818"
description = "ARINC 818 AVDB protocol"
switch(type) :
TX : make-port(`TX, diff-pair)
RX : make-port(`RX, diff-pair)
Comment on lines +62 to +67
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For other unidirectional standards like DisplayPort, we don't differentiate between transmit and receive.

It feels like this attempting to implement a Cardinality style implementation. Ie - this is a output, this is an input, kind of thing.

Side note - is the ARINC818 really just a diff-pair ? Do we have a copy of the spec ?

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The standard is just a uni-directional diff-pair modeled on FiberChannel but the physical layer implementation is pretty well unspecified. I was trying to force an ordering by the type of bundle (TX -> RX) only.


doc: \<DOC>
@brief Construct the ARINC818 Topology and Constraints

This function constructs the ARINC818 topology and applies constraints
to the channel for intra-pair skew and channel loss. Note that a connection
needs to be between a TX on a transmitter and a RX on a receiver.

@param sw The intra-pair skew value for the differential signals being connected.
@param ml The maximum loss for all differential signals being connected.
@param src This is expected to be a port of `Bundle` type `ARINC818`
@param dst This is expected to be a port of `Bundle` type `ARINC818`

<DOC>
public defn connect-ARINC818 (cons:SI-Constraint, src:JITXObject, dst:JITXObject) :
inside pcb-module :
check-bundle(ARINC818(TX), src)
check-bundle(ARINC818(RX), dst)
check-correct-pins(src.TX.P, dst.RX.P)
within [s,d] = constrain-topology(src.TX => dst.RX, cons) :
topo-net(s d)

doc: \<DOC>
@brief Check the presence of a TX and RX version of the ARINC818 bundle

This function checks the presence of the TX and RX pins on the ARINC818 bundle.

@param p-tx The TX pin
@param p-rx The RX pin
<DOC>
public defn check-correct-pins (p-tx:JITXObject p-rx:JITXObject):
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We have a check-single-pin already:

public defn check-single-pin (p-set:JITXObject ...):

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Yep, tried to use that first. But the error message would not make sense in the context that you did not connect the TX to RX but instead connected RX to TX. The reason to make this directional is that some implementations are optical and in that case, you need some more directionality?

for p1 in [p-tx p-rx] do:
match(port-type(p1)):
(x:SinglePin): false
(x):
throw $ ArgumentError("Expected TX & RX Pins - Received: %_" % [x])

doc: \<DOC>
@brief Curated values for skew and loss of ARINC818 connection
This is a helper function that returns the bounds on the intra-pair
skew timing and maximum loss as expected by the particular standard targeted by
the user.The values returned are a toleranced value with upper/lower limits for the
intra-pair skew and the maximum loss as a double representing dB.

Calculating the intra-pair skew distance to time correspondence depends on the material.
tpd 147 ps/in 170 ps/in -> 147 fs/mil to 170 fs/mil
@ 5 mils spec'ed that is a intra-pair skew of 750 fs to 850 fs
@ 10 mils spec'ed that is a intra-pair skew of 1.50 ps to 1.70 ps
<DOC>

public defn ARINC818-get-skew-loss-vals (version:jsl/protocols/arinc818/ARINC818Version) -> [Toleranced, Double]:
switch(version) :
ARINC818-FC1x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-1p5 : [0.0 +/- 1.0e-12, 15.0]
ARINC818-1p62 : [0.0 +/- 1.0e-12, 15.0]
ARNIC818-FC2x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-2p5 : [0.0 +/- 1.0e-12, 15.0]
ARINC818-3p1875 : [0.0 +/- 1.0e-12, 15.0]
ARNIC818-FC4x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-5p0 : [0.0 +/- 1.0e-12, 15.0]
ARINC818-FC6x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-FC8x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-FC12x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-FC16x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-FC24x : [0.0 +/- 1.0e-12, 15.0]
ARINC818-FC32x : [0.0 +/- 1.0e-12, 15.0]


doc: \<DOC>
@brief Differential impedance specified by the ARINC818 standard
This is a helper function that returns the expected differential
trace impedance.

@return Upper/lower limits for the impedance.
<DOC>

public defn ARINC818-get-trace-impedance () -> Toleranced :
100.0 +/- (10 %)

doc: \<DOC>
Construct a ARINC818-Constraints object

@param route-struct Differential Pair Routing Structure - Use
`pcb-differential-routing-structure` to create.
@return Diff-Pair Constraint Object
<DOC>
public defn ARINC818-Constraint (
--
version:jsl/protocols/arinc818/ARINC818Version = ARINC818-FC8x
route-struct:DifferentialRoutingStructure
) -> DP-Constraint :
val [s, ml] = ARINC818-get-skew-loss-vals(version)
DP-Constraint(skew = s, loss = ml, route-struct = route-struct)