Skip to content

Conversation

@weilanad
Copy link

@weilanad weilanad commented Jun 27, 2025

Tests

  • axi4lite_Register
    • updated register definition
    • added testcase for
      • checking initial values on all registers
      • simple read write

@Paebbels Paebbels changed the title updated AXI4Lite register testcase Updated AXI4Lite register testcase Jun 27, 2025
@weilanad weilanad force-pushed the plc2/axi4lite-register branch from 56f9947 to 48e633d Compare June 27, 2025 15:40
@weilanad weilanad force-pushed the plc2/axi4lite-register branch from 48e633d to 2028c88 Compare June 27, 2025 15:44
@stefanunrein
Copy link

@Paebbels can we merge this branch? The header and TB fixes are ok from my side.

@Paebbels Paebbels marked this pull request as ready for review August 25, 2025 09:23
@weilanad weilanad marked this pull request as draft August 26, 2025 08:20
@weilanad weilanad marked this pull request as ready for review August 26, 2025 10:23
@weilanad weilanad requested a review from Paebbels August 26, 2025 10:23
@Paebbels Paebbels changed the base branch from master to dev August 27, 2025 18:57
@Paebbels Paebbels merged commit 7b58aeb into VHDL:dev Aug 27, 2025
6 checks passed
@Paebbels Paebbels added the Enhancement Code improvements. label Aug 27, 2025
@Paebbels Paebbels mentioned this pull request Aug 27, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

Core: AXI4-Lite Register Enhancement Code improvements. Testbench Testbench related.

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants