Updated Riviera-PRO Support

docs/news.d/1073.bugfix.rst

@@ -0,0 +1,4 @@
+Added support for adding external Riviera-PRO libraries by library file rather than library directory.
+This is needed when the name of the library directory differs from that of the library file.
+
+Included all libraries in the ``vsim`` call using the ``-L`` option.

tests/unit/test_project.py

@@ -1915,16 +1915,7 @@ def test_add_external_library_must_exist(self):
         try:
             self.project.add_library("lib2", "lib_path2", is_external=True)
         except ValueError as err:
-            self.assertEqual(str(err), "External library 'lib_path2' does not exist")
-        else:
-            assert False, "ValueError not raised"
-
-    def test_add_external_library_must_be_a_directory(self):
-        write_file("lib_path3", "")
-        try:
-            self.project.add_library("lib3", "lib_path3", is_external=True)
-        except ValueError as err:
-            self.assertEqual(str(err), "External library must be a directory. Got 'lib_path3'")
+            self.assertEqual(str(err), "External library lib_path2 does not exist")
         else:
             assert False, "ValueError not raised"
 

vunit/library.py

@@ -11,6 +11,7 @@
 """
 
 import logging
+from typing import Optional
 from vunit.vhdl_standard import VHDLStandard
 
 LOGGER = logging.getLogger(__name__)
@@ -21,9 +22,18 @@ class Library(object):  # pylint: disable=too-many-instance-attributes
     Represents a VHDL library
     """
 
-    def __init__(self, name: str, directory: str, vhdl_standard: VHDLStandard, is_external=False):
+    def __init__(
+        self,
+        name: str,
+        directory: str,
+        vhdl_standard: VHDLStandard,
+        is_external=False,
+        *,
+        file_name: Optional[str] = None,
+    ):
         self.name = name
         self.directory = directory
+        self.file_name = file_name
 
         # Default VHDL standard for files added unless explicitly set per file
         self.vhdl_standard = vhdl_standard

vunit/project.py

@@ -86,6 +86,8 @@ def add_library(
         directory: Union[str, Path],
         vhdl_standard: VHDLStandard = VHDL.STD_2008,
         is_external=False,
+        *,
+        file_name: Optional[str] = None,
     ):
         """
         Add library to project with logical_name located or to be located in directory
@@ -96,15 +98,14 @@ def add_library(
         dpath = Path(directory)
         dstr = str(directory)
 
-        if is_external:
-            if not dpath.exists():
-                raise ValueError(f"External library {dstr!r} does not exist")
+        full_path = dpath / file_name if file_name is not None else dpath
 
-            if not dpath.is_dir():
-                raise ValueError(f"External library must be a directory. Got {dstr!r}")
+        if is_external:
+            if not full_path.exists():
+                raise ValueError(f"External library {full_path} does not exist")
 
-        library = Library(logical_name, dstr, vhdl_standard, is_external=is_external)
-        LOGGER.debug("Adding library %s with path %s", logical_name, dstr)
+        library = Library(logical_name, dstr, vhdl_standard, is_external=is_external, file_name=file_name)
+        LOGGER.debug("Adding library %s with path %s", logical_name, full_path)
 
         self._libraries[logical_name] = library
         self._lower_library_names_dict[logical_name.lower()] = library.name

vunit/sim_if/rivierapro.py

@@ -145,7 +145,10 @@ def setup_library_mapping(self, project):
         mapped_libraries = self._get_mapped_libraries(self._sim_cfg_file_name)
         for library in project.get_libraries():
             self._libraries.append(library)
-            self.create_library(library.name, library.directory, mapped_libraries)
+            path = (
+                str(Path(library.directory) / library.file_name) if library.file_name is not None else library.directory
+            )
+            self.create_library(library.name, path, mapped_libraries)
 
     def compile_source_file_command(self, source_file):
         """
@@ -310,6 +313,9 @@ def _create_load_function(
 
         vsim_flags += ["-lib", config.library_name]
 
+        for library in self._libraries:
+            vsim_flags += ["-L", library.name]
+
         if config.vhdl_configuration_name is None:
             # Add the the testbench top-level unit last as coverage is
             # only collected for the top-level unit specified last

vunit/ui/__init__.py

@@ -232,7 +232,7 @@ def add_external_library(self, library_name, path: Union[str, Path], vhdl_standa
         Add an externally compiled library as a black-box
 
         :param library_name: The name of the external library
-        :param path: The path to the external library directory
+        :param path: The path to the external library file or directory
         :param vhdl_standard: The VHDL standard used to compile files,
                               if None the VUNIT_VHDL_STANDARD environment variable is used
         :returns: The created :class:`.Library` object
@@ -245,11 +245,20 @@ def add_external_library(self, library_name, path: Union[str, Path], vhdl_standa
 
         """
 
+        resolved_path = Path(path).resolve()
+        if resolved_path.is_file():
+            directory = resolved_path.parent
+            file_name = resolved_path.name
+        else:
+            directory = resolved_path
+            file_name = None
+
         self._project.add_library(
             library_name,
-            Path(path).resolve(),
+            directory,
             self._which_vhdl_standard(vhdl_standard),
             is_external=True,
+            file_name=file_name
         )
         return self.library(library_name)