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[AIEX] Refactor determineCalleeSaves for L register spill optimization MLIR Tests #1174: Commit 05a0166 pushed by khallouh
10m 46s aie-public
aie-public
10m 46s
[AIEX] Refactor determineCalleeSaves for L register spill optimization MLIR Tests #1173: Pull request #1011 synchronize by khallouh
9m 20s khallouh.refactor.determinecsr
khallouh.refactor.determinecsr
9m 20s
[AIEX] Refactor determineCalleeSaves for L register spill optimization MLIR Tests #1172: Pull request #1011 opened by khallouh
10m 54s khallouh.refactor.determinecsr
khallouh.refactor.determinecsr
10m 54s
[CI] Make nightly wheel version PEP 440 / PyPI compliant MLIR Tests #1171: Pull request #1000 synchronize by hunhoffe
9m 6s hunhoffe:pypi-compliant-versioning
hunhoffe:pypi-compliant-versioning
9m 6s
[AIE2PS] Baseline Tests for outerloop pipelining on gemm_int8_psum ke… MLIR Tests #1170: Commit dd39b9d pushed by F-Stuckmann
9m 27s aie-public
aie-public
9m 27s
[AIE2PS] outerloop pipeliner unit-tests MLIR Tests #1169: Pull request #1010 synchronize by F-Stuckmann
8m 51s stuckmann.outerloop.e2e-tests
stuckmann.outerloop.e2e-tests
8m 51s
[AIE2PS] outerloop pipeliner unit-tests MLIR Tests #1168: Pull request #1010 synchronize by F-Stuckmann
9m 2s stuckmann.outerloop.e2e-tests
stuckmann.outerloop.e2e-tests
9m 2s
[AIE2PS] outerloop pipeliner unit-tests MLIR Tests #1167: Pull request #1010 opened by F-Stuckmann
1m 27s stuckmann.outerloop.e2e-tests
stuckmann.outerloop.e2e-tests
1m 27s
[AIEX] Implement foldImmediate Peephole optimization MLIR Tests #1166: Pull request #1009 opened by khallouh
7m 50s khallouh.fold.immediates.peephole
khallouh.fold.immediates.peephole
7m 50s
Martien.maxlatencyfinder MLIR Tests #1165: Pull request #1007 synchronize by martien-de-jong
11m 51s martien.maxlatencyfinder
martien.maxlatencyfinder
11m 51s
Martien.maxlatencyfinder MLIR Tests #1164: Pull request #1007 synchronize by martien-de-jong
13m 12s martien.maxlatencyfinder
martien.maxlatencyfinder
13m 12s
[AIE][NFC] Cache latch exit condition analysis in outer loop pipeliner MLIR Tests #1163: Commit 9e603b7 pushed by andcarminati
31m 20s aie-public
aie-public
31m 20s
[AIE] Enable HL by default in AIEOuterLoopPipeliner MLIR Tests #1162: Pull request #1006 synchronize by andcarminati
10m 5s andreu.outerloop.jnzd
andreu.outerloop.jnzd
10m 5s
[AIE2PS] Fixup L spill test to not use CSR register for return MLIR Tests #1161: Commit b6cddea pushed by khallouh
1h 45m 54s aie-public
aie-public
1h 45m 54s
[AIE2PS] Fix alignment of 64-bit spills and improve CSR spills of L registers MLIR Tests #1160: Pull request #1001 synchronize by khallouh
9m 1s khallouh.fix.64.align
khallouh.fix.64.align
9m 1s
[AIE2PS] Fix alignment of 64-bit spills and improve CSR spills of L registers MLIR Tests #1159: Pull request #1001 synchronize by khallouh
9m 30s khallouh.fix.64.align
khallouh.fix.64.align
9m 30s
[AIE] Enable HL by default in AIEOuterLoopPipeliner MLIR Tests #1158: Pull request #1006 synchronize by andcarminati
8m 59s andreu.outerloop.jnzd
andreu.outerloop.jnzd
8m 59s
[AIE2PS] Fix alignment of 64-bit spills and improve CSR spills of L registers MLIR Tests #1157: Pull request #1001 synchronize by khallouh
9m 29s khallouh.fix.64.align
khallouh.fix.64.align
9m 29s
[AIE] Enable HL by default in AIEOuterLoopPipeliner MLIR Tests #1156: Pull request #1006 synchronize by andcarminati
11m 13s andreu.outerloop.jnzd
andreu.outerloop.jnzd
11m 13s
[AIE] Enable HL by default in AIEOuterLoopPipeliner MLIR Tests #1155: Pull request #1006 synchronize by andcarminati
4m 13s andreu.outerloop.jnzd
andreu.outerloop.jnzd
4m 13s
[AIE2PS] Fix alignment of 64-bit spills and improve CSR spills of L registers MLIR Tests #1154: Pull request #1001 synchronize by khallouh
9m 13s khallouh.fix.64.align
khallouh.fix.64.align
9m 13s
[CI] Make nightly wheel version PEP 440 / PyPI compliant MLIR Tests #1153: Pull request #1000 synchronize by hunhoffe
8m 58s hunhoffe:pypi-compliant-versioning
hunhoffe:pypi-compliant-versioning
8m 58s
[AIE2PS] Fix alignment of 64-bit spills and improve CSR spills of L registers MLIR Tests #1152: Pull request #1001 synchronize by khallouh
9m 58s khallouh.fix.64.align
khallouh.fix.64.align
9m 58s
[AIE] Enable HL by default in AIEOuterLoopPipeliner MLIR Tests #1151: Pull request #1006 opened by andcarminati
9m 12s andreu.outerloop.jnzd
andreu.outerloop.jnzd
9m 12s
[AIE] Implement top-down delay slot fixup for regions with top-fixed … MLIR Tests #1150: Commit d8404a0 pushed by andcarminati
9m 36s aie-public
aie-public
9m 36s