[NFC] Serialize/Deserialize Register Allocations during Allocation#750
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This commit introduces the MIRVirtRegMapInfo class and the MIRVirtRegMapWrapperLegacy pass, which facilitate the handling of virtual register assignments loaded from MIR files. The changes include: - New class `MIRVirtRegMapInfo` to store virtual to physical register mappings and stack slot information. - Implementation of `MIRVirtRegMapWrapperLegacy` to provide access to MIR-loaded register assignments within the MachineFunction. - Updates to various components to integrate MIR VirtRegMap handling, including modifications to the MachineFunction, MIRPrinter, and related parsing logic. - New tests to verify the serialization and deserialization of VirtRegMap assignments in MIR. This enhancement improves the register allocation process by ensuring that MIR data is correctly utilized when splitting the register allocation into stages.
F-Stuckmann
requested review from
SagarMaheshwari99,
abhinay-anubola,
abnikant,
andcarminati,
katerynamuts,
khallouh,
konstantinschwarz,
martien-de-jong,
mludevid,
niwinanto and
stephenneuendorffer
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F-Stuckmann
changed the base branch from
aie-public
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stuckmann.superreg.rewriter.fix.empty.sublanes
andcarminati
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Jan 6, 2026
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| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py | |||
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If this file is not a test, why do we have this note about update_mir_test_checks.py?
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Added Splits and Required Registers to serialization and deserialization |
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We are missing serdes of LiveStacks |
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This PR enables the stopping and restarting of the Register allocation within stages of the Register Allocation.
This PRs goal is to simplify the debugging and testing of our Register Allocation pipeline by making it modular like the rest of llvm.