Reorder scheduling order of MBBs#993
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F-Stuckmann
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| ; loop: inner loop %for.body55.i82 and outer loop body %for.body.i68. | ||
| ; | ||
| ; RUN: llc -mtriple=aie2ps -verify-machineinstrs < %s | FileCheck %s | ||
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| }; | ||
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| // Phase 1: (single-block) loops first, so they aren't constrained by | ||
| // their epilogues. |
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nit: Loops will not be constrained anyway. The real reason is that the loop schedule should be taken into account by prologue epiloguie.
| // post-order. post_order(E) ends with E itself, so E is scheduled AFTER | ||
| // everything reachable from it (its successors are already done -> precise | ||
| // inter-block latency for E) and BEFORE its non-loop predecessors. The | ||
| // latter is what keeps MaxLatencyFinder in precise mode for SWP prologues |
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I think prologues are irrelevant, except that it is frequently a successor of the epilogue. The goal is to bring the epilogue in precise mode.
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I have this feeling as well.
This could be:
- insert loops
- insert non-epilogues
- insert epilogues.
We could also insert all blocks and reorder them with a custom comparison function Loop < Non-epilogue < Epilogue
| for (auto &[MBB, BS] : Blocks) { | ||
| if (BS.Kind == BlockType::Loop) { | ||
| MBBSequence.push_back(MBB); | ||
| Push(MBB); |
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We push loop in pointer order, which is not deterministic. It's not performance critical to run over MF->Blocks and do the lookup for the blockstate.
andcarminati
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May 8, 2026
| ; | ||
| ; RUN: llc -mtriple=aie2ps -verify-machineinstrs < %s | FileCheck %s | ||
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| source_filename = "Work/aie/0_0/src/0_0.cc" |
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You can remove this metadata,
andcarminati
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May 8, 2026
| target triple = "aie2ps-none-unknown-elf" | ||
| $_Z6conv2dILh1EL5act_t0EaaaLb0ELb1EEvPT1_PT2_PT3_R13conv2d_paramsS6_S6_ = comdat any | ||
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| ; Function Attrs: mustprogress |
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nit: rename the function.
andcarminati
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May 8, 2026
| !18 = !{!8, !10, i64 84} | ||
| !19 = !{!8, !10, i64 120} | ||
| !20 = !{!21} | ||
| !21 = distinct !{!21, !22, !"_Z18conv2d_generic_optILh1EL5act_t0EL10out_mode_t0EaaaEvPiS2_S2_S2_S2_R13conv2d_params: %input"} |
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nit: rename this. See end-to-end tests.
andcarminati
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May 8, 2026
| ; CHECK-NEXT: padda [p1], m0; movs dn4, r27; mov m5, r19 // Delay Slot 4 | ||
| ; CHECK-NEXT: vlda.ups.2x cml0, s0, upssign1, [p1, #0]; movs dc4, r5; mov m0, r21 // Delay Slot 3 | ||
| ; CHECK-NEXT: padda [p1], m7; paddb.3d [p0], d0; padds [p6], m5 // Delay Slot 2 | ||
| ; CHECK-NEXT: vlda.ups.2x cmh0, s0, upssign1, [p1, #0]; paddb.3d [p6], d1; movx srssign0, #0; mov r5, dc4 // Delay Slot 1 |
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This is flying high :-)
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This looks good! Some nits and suggestions! |
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Provide accurate scoreboard information for epilogues by scheduling its' prologues beforehand.
Awaiting QoR.