Select Shim Tile Used for Trace Packet Extraction#3120
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…tract trace packets.
Victor-Jung
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abisca,
andrej,
denolf,
erwei-xilinx,
fifield,
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jackl-xilinx,
jgmelber,
pvasireddy-amd and
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Pull request overview
This PR adds an IR/Python-level knob (egress_shim_col, defaulting to 0) to control which shim column is used as the egress destination for trace packet extraction, avoiding unrouteable designs when column 0 shim resources are congested.
Changes:
- Extend
aie.trace.host_configwith a newegress_shim_colattribute (MLIR assembly + verifier). - Update
-aie-insert-trace-flowsto routerouting=singletraces to the selected shim column and validate it. - Plumb the new option through the Python helper and update the basic event trace example.
Reviewed changes
Copilot reviewed 5 out of 5 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| python/dialects/aie.py | Adds egress_shim_col parameter to trace_host_config and forwards it to the op. |
| programming_examples/basic/event_trace/aie_trace.mlir | Demonstrates selecting a non-default shim column for trace egress. |
| lib/Dialect/AIE/Transforms/AIEInsertTraceFlows.cpp | Uses egress_shim_col to select the target shim column and validates the choice. |
| lib/Dialect/AIE/IR/AIETraceOps.cpp | Prints/parses egress_shim_col and verifies it is non-negative. |
| include/aie/Dialect/AIE/IR/AIETraceOps.td | Documents and defines the new egress_shim_col default-valued attribute. |
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| // All traces route to a single shim, controlled by the egress_shim_col parameter (default is 0). | ||
| int targetCol = egressShimColFromIR; | ||
| if (targetCol >= targetModel.columns() || | ||
| !targetModel.isShimNOCTile(targetCol, 0)) { | ||
| device.emitError() << "egress_shim_col " << targetCol | ||
| << " is not a valid shim NOC tile (device has " | ||
| << targetModel.columns() << " columns)"; | ||
| return signalPassFailure(); |
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| // Validate Shim col id | ||
| if (getEgressShimCol() < 0) { | ||
| return emitOpError("egress_shim_col must be >= 0"); | ||
| } |
| // Configure trace output buffer (8192 bytes, default arg_idx=4) | ||
| aie.trace.host_config buffer_size = 8192 | ||
| // Configure trace output buffer (8192 bytes, default arg_idx=4). | ||
| // Select which shim should be used by the egress trace transfer (default is the shim tile from column 0). |
fifield
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May 28, 2026
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How does this relate to and interact with the lateral trace routing feature?
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@jgmelber
Trace packet flows currently land on the shim at column 0 (hard-coded target of the
routing = singlestrategy inAIEInsertTraceFlows). On a busy column whose shim channels are already taken by compute flows, this causes the design to be unrootable.This PR adds a small IR-level knob to select which column to use (default is 0).
MLIR:
Python: